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CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Enabling HPS-FPGA bridges on Agilex 7

JackLusenhop
Beginner
738 Views

Hello, 

 

I have been trying to run the HPS system on the Agilex™ 7 FPGA F-Series Development Kit (P-Tile and E-Tile), DK-DEV-AGF014EA and have been following two tutorials: 

https://www.rocketboards.org/foswiki/Documentation/AgilexSoCGSRD

and 

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderAgilex7

I am able to run both tutorials (I know the first tutorial is for the Transceiver Dev Kit, but I am still able to get it working for my device). However, when both boot up I see the following error: 

"...FGPA Reconfiguration OK

Failed to enable the HPS bridges, check bridges availability. Status 4." 

 

My theory is that the bridges are not getting defined anywhere in the device tree. Do you know how to fix this issue?

 

Thanks, 

Jacob

 

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JackLusenhop
Beginner
683 Views

To add on to this. I am just configuring the device with the GHRD and have confirmed that the bridges are setup correctly in Quartus. However, when I open platform designer I do see a warning saying: 

Warning: intel_agilex_hps_inst.bridges.axi_h2f: axi_h2f must be connected to a MM host or exported

I was wondering if this could be contributing to the issue or if the warning is benign. 

Screenshot from 2024-09-14 16-14-50.png 

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sstrell
Honored Contributor III
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Show your actual Platform Designer system and how you have the HPS connected up.  As noted in the messages there, the bridges don't appear to be connected to anything on the FPGA side.

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JackLusenhop
Beginner
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Here are the connections in for the HPS Platform Designer. I have not changed anything from the GHRD design. Screenshot from 2024-09-16 21-10-39.png

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JackLusenhop
Beginner
589 Views

The rest of the connections are here: Screenshot from 2024-09-16 21-10-39.png

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sstrell
Honored Contributor III
580 Views

Can you scroll up? The main bridge connections are off the top of the screen.

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JackLusenhop
Beginner
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Oops, my apologies, I sent the wrong image the second time. Here are the rest of the connections: 

Screenshot from 2024-09-17 09-44-53.png

 

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JackLusenhop
Beginner
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The GHRD I am using can be generated by using the following commands from Agilex GSRD tutorial:

 

git clone -b QPDS24.2_REL_GSRD_PR https://github.com/altera-opensource/ghrd-socfpga

mv ghrd-socfpga/agilex_soc_devkit_ghrd .

rm -rf ghrd-socfpga

cd agilex_soc_devkit_ghrd

export BOARD_TYPE = "DK-DEV-AGF014E"

make scrub_clean_all

make generate_from_tcl

 

I got the same warnings even if I did not change the board type. 

 

 

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sstrell
Honored Contributor III
423 Views

Those are just IP warnings saying you need to connect those interfaces in the system you use the HPS, and they are connected.  You can safely ignore.

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JackLusenhop
Beginner
289 Views

Hi, 

 

That is good to know I can ignore those. Do you have any idea what could be causing the error:

"Failed to enable the HPS bridges, check bridges availability. Status 4."

during the u-boot process? Could it be an issue with the device tree? Do I need to specify the bridges there? I found the hps_bridges mentioned in the device tree inside the socfpga-linux kernel, but not inside the u-boot. 

 

Thanks, 

Jack

 

 

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JingyangTeh
Employee
129 Views

Hi


We sincerely apologize for the inconvenience caused by the delay in addressing your Forum queries. Due to an unexpected back-end issue in our system, your Forum cases, along with others, did not get through as intended. As a result, we have a backlog of cases that we are currently working through one by one.

Please be assured that we are doing everything we can to resolve this issue as quickly as possible. However, this process will take some time, and we kindly ask for your patience and understanding during this period. The cases will be attended by AE shortly.

We appreciate your patience and understanding, and we are committed to providing you with the best support possible. 

Thank you for your understanding.


Back to your issue, have you tried out flashing the prebuilt binaries instead of building the binaries?

Just to confirm that the hardware is working.


Regards

Jingyang, Teh


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JingyangTeh
Employee
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Hi


Do you have any follow up question on this case?


Regards

Jingyang, Teh


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