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Generating sine wave in Verilog

Altera_Forum
Honored Contributor II
‎04-03-2013 08:45 PM
1,491 Views

Hai all, 

I need to generate a sine wave in verilog.. I have the look up table values .. but i dont know how to get the sine angles form that.. I am scaling it to 1024 samples.. below are some of the values.. 

 

 

 

case(angle) 0: sinTable=16'h0; 1: sinTable=16'h64; 2: sinTable=16'hc9; 3: sinTable=16'h12d; 4: sinTable=16'h192; 5: sinTable=16'h1f6; 6: sinTable=16'h25b; 7: sinTable=16'h2bf; 8: sinTable=16'h323; 9: sinTable=16'h388; 10: sinTable=16'h3ec; 11: sinTable=16'h451; 12: sinTable=16'h4b5; 13: sinTable=16'h519; 14: sinTable=16'h57d; 15: sinTable=16'h5e1;can any one help me?Thanks in advance
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Altera_Forum
Honored Contributor II
‎04-04-2013 05:40 AM
484 Views

Consider a counter stepping through all table addresses. For generating higher frequency signals, study the NCO phase accumulator method. It's well dscribed in the Quartus NCO MegaFunction manual.

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