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Hi!
I'm new to this forum, tried to search via google and the forum search but couldn't come up with a bullet proofed answer. This is way I decided to write here - sorry in advance if my question seems obvious. I have an IC which requires two clocks, two input and one output signal sent/received differentially over LVDS, each on an individual channel. The idea was now to design a PCB containing the IC and use a Cyclone III starter board and its HSMC connector to interface the PCB and its IC. Where I struggle now is the fact that the Cyclone III starter board reference manual states --- Quote Start --- CMOS utilization of the HSMC pins is assumed and no options for supporting other differential signaling is provided with the board. --- Quote End --- on page 2-9. Having a look at the Cyclone III device handbook I know that this FPGA supports LVDS and even contains OCT support without the need for an external impedance network. Also the schematics of the Cyclone III starter board show 13 transmitter (output) and 13 receiver (input) differential lines. So: Am I correctly assuming that I can use the Cyclone III starter board and its HSMC connector to transmit and receive multiple LVDS signals (also containing clocks)? Any help is much appreciated and thanks in advance!Link Copied
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I don't understand that statement in the starter board manual. As you saw in the schematic, the board is set up to support differential signalling to/from the HSMC connector. And it looks like all of the banks are running at 2.5V, so you should be good to go.
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They must have written the comment for a reason. It isn't likely that someone with firsthand experience will reply due to the age of the board. If you want to roll the dice, go ahead and atleast create a dummy project with pin assignments and constraints for what you are planning and see if there is some subtle rule preventing it from ever working. Otherwise, I would say pick a newer board that doesn't have such constraints like maybe Be Micro ones.
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Thank you for your quick answers. The board is quite old, I know, but there are existing libraries to talk with my IC for this specific FGPA. In any case I guess I will give it a try.
--- Quote Start --- go ahead and atleast create a dummy project with pin assignments and constraints for what you are planning and see if there is some subtle rule preventing it from ever working --- Quote End --- Short question about this: Since the FPGA is supporting LVDS which kind of rule should prevent me of doing this? Has Quartus some specific rule set for FPGAs on its dev/starter kits?- Mark as New
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Are you sure Cyclone III has on-chip differential terminations? I don't think it does, and the board does not have external termination resistors. Read the section on "OCT Support" in chapter 6 of the handbook.
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Indeed, despite that the Cyclone III clearly supports OCT (page 6-7), it doesn't seem to support OCT for the LVDS standard - how strange is that? But thanks for pointing it out, it seems as if the starter board isn't a possible choice then. Thank you a lot!
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