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Hello,
I am beginning with Nios, and I am doing a Little test, but something strange happens. I am generating a RAMP using just VHDL, no NIOS, No SOPC and storing it in my RAM. Then I want to read this data using the NIOS processor. Just to play with NIOS. I am using 2 projects> I have one project where I have my own SRAM_CONTROLLER codified using just VHDL. Then using SIGNAL_TAP_LOGIC ANALYZER I can verify that the data is correctly stored in the RAM. Then I switch my project, to other project designed with SOPC Builder (here I use the CY7c1380c IPCORE), here I want to read the data that was previously stored in the first project. (I do not turn off my board, so the data of the RAM should be there, and then I should be able to read it. But the strange issue, is that, I read strange things from NIOS. I was expecting to read> 1,2,3,4,5,6,7,..... But I read> 4,8,12,16 From NIOS, It reads data each 4 address of my SRAM, like if the address increment is always 4. Thank you. Attached are: 1. The signals that I use for verify data management with my project of just vhdl. RAMP_JUST_VHDL.jpg 2. My sopc system of project 2. sopc_system.jpg 3. This is my nios code: //////////////////////////////////////////////////////////////////// int main() { alt_u32 read_value[512],value,ind; alt_putstr("ram test!\n"); value=value_ssram=toggle=0; // Event loop never exits. while (1) { if(value<512) { ind=IORD(SSRAM_0_BASE,value); read_value[value]=ind; value++; } else { value=0; } } return 0; } ////////////////////////////////// Gracias.Link Copied
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Have you tried using IORD_8DIRECT?
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Hello Ketan,
I used IORD_32DIRECT, and now it is working. What is the difference between IORD_32DIRECT and IORD. According with one post of jacobjones, some years ago he said <As a suggestion, I would recommend using the IORD macro instead of IORD_32DIRECT. You can accomplish the same thing but it's a little easier to think about.> Thank you. Att. Diego Botero
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