during the HPS programmming, I noticed the clock source in GHRD is a 50MHZ clock.
And the board had a DIP switch to control the clock source.
Could you please tell me where that clock source come from and how can I change this to other sources(for example the programmable clock highlighted above)
I read through the data sheet, but I still dont know how to program it through the HPS(baremetal)/FPGA
Could you please give more information about how to change the SOC clk source to programmable clk and how to program it?
Thank you very much for your help.
Please foirgive me for my later apply.
I will try to check about it but i need some info.
1) May i have the document for the board (datsheet)
2) which referece GHRD do you refer? (example rocketbord page)
3) may i know which uboot source (link) are using? (maybe can change at device tree)
for the questions:
1) The layer sheet is attached.
2) It's the newest rocketboard GSRD for cycloneVsoc.
3) Since I want to use the baremetal system,I dont think it would be useful for I always use the SPL to start my board.
But the Uboot I use is 2020_07 version of altera-opensource/u-boot-socfpga.
Please let me know if you need any other information.
I have found the method
The Clock Control application sets the Si570 (X1) or Si571 (X3) programmable oscillators to any frequency between 10 MHz and 810 MHz.
The frequencies support eight digits of precision to the right of the decimal point. The Clock Control application runs as a stand-alone application.
ClockControl.exe resides in the <installdir>\kits\cycloneVSX_5csxfc6df31_soc\examples\board_test_system directory.
To start the application, click Start > All Programs > Altera >Cyclone V SoC Development Kit <version> > Clock Control.
I will try at my end too
Here is my method.
2) download this Kit Installation (ZIP) (22.1 std) ›
3) make sure you install quartus programmer that suite with your project version
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