Programmable Devices
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Transciever Support Cyclone IV - How to implement the PCIE hard IP for Cyclone IV GX

MiguelAvina
Beginner
188 Views

Hi,

Is there example code and IP that they we can implement in QSYS for  PCIE hard IP for Cyclone IV GX ?

 

Thanks

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1 Solution
wchiah
Employee
173 Views

Hi,


For implementation fo QSYS to hard IP of cyclone IV,

You may refer to the user guide.

https://www.intel.com/content/dam/support/us/en/programmable/support-resources/bulk-container/pdfs/l...


Let me know if anything is not clear or you need more information about it.

Regards,

Wincent_Intel


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5 Replies
wchiah
Employee
174 Views

Hi,


For implementation fo QSYS to hard IP of cyclone IV,

You may refer to the user guide.

https://www.intel.com/content/dam/support/us/en/programmable/support-resources/bulk-container/pdfs/l...


Let me know if anything is not clear or you need more information about it.

Regards,

Wincent_Intel


wchiah
Employee
162 Views

Hi,

 

I wish to follow up with you about this case.

Do you have any further questions on this matter ?

​​​​​​​Else I would like to have your permission to close this forum ticket

 

Regards,

Wincent_Intel


MiguelAvina
Beginner
157 Views

Hi Wincent,

Thanks for your response. I'll close the ticket

wchiah
Employee
150 Views

Hi,


Glad that it is able to help, Hence I will proceed to close this ticket


Hence, This thread will be transitioned to community support.

If you have a new question, feel free to open a new thread to get support from Intel experts.

Otherwise, the community users will continue to help you on this thread. Thank you


If you feel your support experience was less than a 9 or 10,

please allow me to correct it before closing or let me know the cause so that I may improve your future support experience.

 

Regards,

Wincent_Intel


MiguelAvina
Beginner
136 Views

Hi Wincent,

How can I ask for further support on this? Should I open a new ticket?

My customer is wanting to move forward with Cyclone IV GX devices. The UG you sent is for Cyclone V. Is this applicable to the Cyclone IV? I found the user guide the IP Compiler for PCIE User guide which I believe will support the Cyclone IV. With that I could really use and example design to share with the customer. I was unable to find one supported in V18.1 lite

Thanks

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