Using PLL to synchronize Data stream on Cyclone III

[Altera_Forum]

Hi everyone,  

I have a 125MHz asynchronus NRZI bit-stream as an input into my FPGA. I want to sample this bit-stream and make sure, that I sample each bit once and correct. Can I use the NRZI bit stream as the reference-input to a PLL to phase-allign the generated clock to the data and then sample it with a Flip Flop on the falling edge?  Thank you very much for your help   

[Altera_Forum]

No. As long as can't derive a continuous square wave from the input signal, a regular FPGA PLL won't work. The PLL dynamic phase shift feature can be utilized to make a software CDR with limited frequency range, well sufficient for a data stream with crystal timed frequency.