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What does an address space contain?

Altera_Forum
Honored Contributor II
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Hi, I added a simple component LCD12864 into nios system.Then I got the address space from system.h:#define LCD12864_BASE 0x00000800#define LCD12864_SPAN 16But I don't know:1) Why SPAN=16.2) What contents in the space: LCD12864_BASE=? LCD12864_BASE+1=? LCD12864_BASE+2=? ... LCD12864_BASE+15=?Looking for your help.Thanks in advanceLiuJN

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Altera_Forum
Honored Contributor II
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The answer is in these two pieces of code: else if (avs_chipselect & avs_write) begin case (avs_address) 0: coe_e <= avs_writedata; 1: coe_rw <= avs_writedata; 2: coe_rs <= avs_writedata; 3: coe_data_o <= avs_writedata; endcase endand if (avs_chipselect & avs_read) begin if (avs_address == 3) readdata_r <= coe_data_i; else readdata_r <= 8'b0; end else readdata_r <= 8'b0; assign avs_readdata = {24'b0, readdata_r}; 

Writing on the first 3 addresses changes one signal to the lcd controller, controlled by the LSB of your data word (i.e. write "0" to drive the signal low and "1" to drive it high). Address LCD12864_BASE controls E, LCD12864_BASE+4 controls RW, and LCD12864_BASE +8 controls RS. On the last address (LCD12864_BASE+12), you control the data written to the controller with the low 8 bits. 

Reading on the first 3 addresses returns 0, and reading from LCD12864_BASE+12 returns you the word written by the LCD controller in the low 8 bits. 

The component uses 32-bit data registers for read and write, and has 4 registers. That's why the span is 4*4=16. This is also why you need to increase the address in steps of 4 to access each register.
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Altera_Forum
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Thank you very much,Daixiwen.Can you tell me more about it:1)Does the address space contain only conduit_end?2)Is there any paper describe it in detail?Thank you more.LiuJN. 

I am sorry that I dont know why my post can only display in one line.
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Altera_Forum
Honored Contributor II
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It depends on your component. This one connects the avalon bus to the external conduit in a rather direct way, but other components could do some processing or provide internal memory instead. 

The main documentation about the Avalon bus is the specification (http://www.altera.com/literature/manual/mnl_avalon_spec.pdf).
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