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how to instantiate the Altera v17.0 pll in the verilog file.can i get the instantiation code.

JGeor12
Beginner
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ak6dn
Valued Contributor III
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Do you use the Tools / IP_Catalog MegaWizard to generate the PLL configuration in the QuartusII tool?

If not, you should.

It can generate a template Verilog instantiation file for you.

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Vicky1
Employee
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Hi,

Correct, Please check the 'Generate' Menu of Platform Designer-> 'Show Instantiate Template' as shown below & provide the 'Top level design signals/wires for instantiation inside braces as highlighted, Template my vary depends on PLL configuration.

PLL_Inst.JPG

For IP Catalog,

IP Catlog.JPG

Regards,

Vicky

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