Re: NIOSII Flash Programmer

Altera_Forum · ‎03-03-2005

Hi everyone,

I'm trying to build a small demo application (like helo_world) that runs automatically after board reset. I'm using the Nios development Kit Cyclone Edition. I have already stored my FPGA-configuration in the user-area of the onboard flash at address 0x600000. After reset, this configurations is loaded. Some LEDs indicate that really my design is configured.

Now i can download my small programm via the RUN...-command from NIOSII IDE and it also works fine. In the next step I want to store it in flash too, so that it's executed after reset. I use the flash-programmer again. All messages say: everything works, but after reset nothing happens. Does anyone have some suggestions, what I can do?

Thera are also some inconsistencies in the messages during compilation. Please take a look at the following:

# Creating .flash file for the FPGA configuration

$SOPC_KIT_NIOS2/bin/sof2flash --flash=U5 --offset=0x600000 --input=G:/Testprojek

t2/mpsoc.sof --output=mpsoc.flash

Info: *******************************************************************

Info: Running Quartus II Convert_programming_file

Info: Command: quartus_cpf --no_banner --convert G:/Testprojekt2/mpsoc.sof mpsoc

.rbf

Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings

Info: Processing ended: Thu Mar 03 13:17:53 2005

Info: Elapsed time: 00:00:01

# Programming flash with the FPGA configuration

$SOPC_KIT_NIOS2/bin/nios2-flash-programmer --input=mpsoc.flash --sof=$SOPC_KIT_N

IOS2/components/altera_nios_dev_board_cyclone_1c20/system/altera_nios_dev_board_

cyclone_1c20.sof --base=0x00800000

My question is, what role does the altera_nios_dev_board_cyclone_1c20.sof file play? My designs is named mpsoc.sof! Why is the base-option set to 0x00800000 at the second step? That address is defined as the base-address of the sram device integrated in the system!

Altera_Forum · ‎03-03-2005

The flash programmer uses its own SOF file when it's programming the flash. The base address specified on the command line here is the base address of your flash device in the flash programmer design.

See the flash programmer user guide documents/ug_nios2_flash_programmer.pdf for more details.

If your design isn't working then you can step through the boot loader (which copies your code from flash to RAM) to see what's happening. In one Nios II shell you should enter:

cd <where your elf file is>
nios2-download --reset-target --tcpport=2342

and in another window:

cd <where your elf file is>
nios2-elf-insight <project.elf>
target remote :2342

This will all be easier in 5.0

Altera_Forum · ‎03-03-2005

Okay, i have established a connection between my board and the debugger. I can download my programm, run it and step through it. This works fine. Now the flash-based version: When i reset the board, the system is halted at the reset_address (0x0 in the flash-device). After that I forward the programm one instruction per step. At address 0x10 (still in __reset) a branch to addr 0x8008 occurs. After that point everything is over. PROGRAMM STOPPED AT 0x8008. Hmm, does someone has an idea?

But the way I want to use the Board is right, isn't it? Just code the application, compile it, store it into flash and it's executed every time the processor is reseted, right? Because the transfer of flash-stored application code to the desired ram-location should be done by the automatic HAL-provided system-initialization!?

Altera_Forum · ‎03-03-2005

uups, my last posted message was not correct. I just was to shocked by the blank screen in the debug window. the system is not halted at address 0x8008. it's stopped later with the message: software_exception () at /cygdrive/d/altera/kits/nios2/components/altera_nios2/HAL/src/alt_exceptions.S:135

quite cryptical to me http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/blink.gif

Altera_Forum · ‎03-03-2005

--- Quote Start ---

originally posted by rj043@Mar 3 2005, 11:38 AM

uups, my last posted message was not correct. i just was to shocked by the blank screen in the debug window. the system is not halted at address 0x8008. it's stopped later with the message: software_exception () at /cygdrive/d/altera/kits/nios2/components/altera_nios2/hal/src/alt_exceptions.s:135

quite cryptical to me http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/blink.gif

--- Quote End ---

Your post is a little cryptical to me as well.

What do you mean the system is halted with the message?

Anyway this line number is in the exception handling code. You can only get into this if you try to run code compiled for a platform with a hardware multiplier, such as Stratix, on a platform without a hardware multiplier e.g. Cyclone.

Altera_Forum · ‎03-04-2005

Okay, I found another solution.

I now use the full_featured example provided with my kit. With that system, it's possible to store programms in flash (and they are executed after reset). So I think the problem is somewhere in my self-made nios2-system. May be, in the address map...

Thanks anyway...

Altera_Forum · ‎03-04-2005

<div class='quotetop'>QUOTE </div>

--- Quote Start ---

My question is, what role does the altera_nios_dev_board_cyclone_1c20.sof file play? My designs is named mpsoc.sof! Why is the base-option set to 0x00800000 at the second step? That address is defined as the base-address of the sram device integrated in the system![/b]

--- Quote End ---

When you use the flash programmer it downloads that hardware image to your board to receive data from the host side. In that hardware design the flash device happens to be located at address 0x00800000. If you want to learn more about it go into your nios2 kit folder, under components, you'll find a folder for each development kit. Open one of those designs in Quartus (they are read only btw so that you can't mess up the flash programmer) and open the system in SOPC builder and take a peak at whats inside (it's a minimal system as you'll see).

I hope that helps clear up some of your questions.

Altera_Forum · ‎03-05-2005

<div class='quotetop'>QUOTE </div>

--- Quote Start ---

So I think the problem is somewhere in my self-made nios2-system. May be, in the address map...[/b]

--- Quote End ---

A classical mistake is to have wrong setting in your nios-II's reset and exception vectors (a property of the nios core, not the address map. Its set in the cpu core):

Reset should point to your flash where you eventually will have your nios image loaded.

I your case, suppose your flash seen from nios core is at address flashBase=+0x0000.0000 you definitely would NOT want to have reset pointing into the zone where your fpga.sof is located (flashBase+0x0060.0000 and up to end of the fpga.sof image)

You would have to find a suitable location in your flash for your nios image and point to that location as it will be seen from nios.

Notice that it is often not sufficient to accept the defaults suggested by SOPC builder. You have to do som thinking here. The flash programmer will warn you of overlapping images, but not tell you what to do.

Exception vector should point to your ram from where your program will run.

In IDE system library properties set all addresses to ram locations where .text and .rodata is same ram as pointed to by Exception vector