What can I do if I come across following question?

[Altera_Forum]

Error: Can't generate netlist output files because the file "E:/2008-04-01/DDR_71/auk_ddr_hp_controller.vhd" is an OpenCore Plus time-limited file

[Altera_Forum]

Please check you have valid license for DDR SDRAM High Performance Controller and this by default comes with encrypted time limited opencore pluse license so only time limited sof will be generated!

[Altera_Forum]

I do not know ,But When I use another IP Core ,It is correctly,It is so complex for me to understand the DDR,and before I have generated DDRII successfully! So i do not think that is the license problem,Could you give me any examples about DDR,thanks!

[Altera_Forum]

I certainly see it as license issue, so you would be able to generate time limited sof but not netlist!

[Altera_Forum]

I have used my workmate's computer to compile ,it is success,How can to know the relatives between the PLL frequency and memory frequency.