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Hi,
My english isn’t very well, sorry. I’m starting to use Matlab/Simulink to program FPGA Stratix II board. I really need some help to projecting a L-ASK modulator. My first question is: How I can create a “look up table” using Altera DSP builder blockset? Thanks so much FabioLink Copied
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there is a block in the Storage section called LUT that is a lookup table.
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Thank you very much ^__^
Fabio
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