Re: Opencore CAN 2.0 Avalon Interface

Altera_Forum · ‎12-06-2010

Hi,

Please I intend to add a custom component (opencore CAN 2.0B) but I am concerned with the type of Avalon Bus I should use for that:

Avalon Memory Mapped Interface (Avalon-MM)

or

Avalon Memory Mapped Tristate Interface

I would appreciated any advices.

Regards,

Altera_Forum · ‎12-06-2010

You can do either.

The CAN component available on OpenCores website, can be configured for Wishbone bus or standard 8051 bus interface.

Wishbone can be easily connected to Avalon MM with minimal glue logic. Same for 8051 bus to tristate bus.

Altera_Forum · ‎12-06-2010

Ok Chris,

I have seen what you means within the file can.defines:


// Uncomment following line if you want to use WISHBONE interface. Otherwise
// 8051 interface is used.
// `define CAN_WISHBONE_IF

As I intended to use Wishbone Interface:So I just have to use the Memory Mapped Slave Interface and the same Glue Logic formel as mentioned on the wiki site.

Am I wrong?

Regards,

Altera_Forum · ‎12-07-2010

You are right.

You must accomplish two steps :

- write a simple wrapper code to convert Wishbone to Avalon

- create the sopc builder component

Altera_Forum · ‎12-08-2010

Please any design guideline to test my CAN interface(CPU+RAM+.......)?

http://www.alteraforum.com/forum/L:\Internship\FPGA_Cyclone IV\Implementation\CAN\can_controller.png