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I created an SOPC block that has conduit-end signals. How do I instantiate the SOPC system and map the conduit-end signals in my top level vhdl file?
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The same as any other block
i.e block declaration is:
COMPONENT sopc_block IS
PORT
(
...
this_is_an_input_conduit_end : IN STD_LOGIC;
...
);
END COMPONENT
Instantiation in a top levelis:
ENTITY top_level_hdl IS
PORT (
...
top_level_signal : IN_STD_LOGIC;
...
);
sopc_inst : sopc_block
PORT MAP(
...
this_is_an_input_conduit_end =>top_level_signal,
...
);
If you want a complete example you can connect your sopc block in a top level schematic, then use Quartus to automatically generate the VHDL file, so you can see how to fully instantiate the block. Regards
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