MAX 10 FPGA Remote System Upgrade (RSU)

[Shiva]

Hi,

I am trying remote system upgrade for MAX10 FPGA device, Here i am able to write and read the rpd data of CFM1 but when i trigger the reconfiguration it is not getting reconfigured. I am doing this remote system upgrade without using the NIOS ii processor.

Can you provide the information regarding, is there any particular way to write the rpd data to configuration flash memory of MAX10 FPGA device and what might be the reason for not getting reconfigured?

Thanks,

Shiva

[JohnT_Intel]

Hi Shiva,

Could you use the examine features in Quartus programmer to read out the content of the CFM? The reason is that it will be easier to compare the file to the RPD file.

[Shiva]

Hi,

When we examine the data that is written into flash memory, the original rpd data and the rpd data read out from the flash are different. In read_out_data file the CFM1 data starts from 0x88A4 to 0x2B8A3.

Can you provide the proper way to write the rpd data to onchip flash memory.

Please find the attachment of rpd data(original) and read_out_data files.

[JohnT_Intel]

Hi Shiva,

From the pof file read out, I observed that the content of CFM1 is incorrect when comparing to your generated RPD file. It is different from what you observed through STM32 microcontroller SPI interface.

May I know if you are able to check if what you send or received from SPI interface is correct to the Avalon-MM interface? May I know if you are using internal Oscillator or external clock for your On-Chip Flash IP? If you are using internal Oscillator then could you switch it to external clock?

[Shiva]

Hi,

Yeah, the data what we are sending and receiving from SPI interface is correct and the same data is going to the Avalon-MM interface.

We are using external 100MHz oscillator for clocking.

Regards,

Shiva.

[JohnT_Intel]

Hi,

May I know if you have try to use SignalTap to tap on the Avalon-MM connection to see if you are reading or writing it correctly? The reason is that I am observing incorrect data being written into the CFM based on the POF file (examine through Quartus Programmer).

[Shiva]

Hi,

Yeah, i am trying signal tap ii logic analyzer to check whether the data going to on chip flash is correct or not.

But it is writing and reading the same data from the respective address. If i send the data through micro controller and read it back it is coming exactly.

And if i flash the pof file and read it back through micro controller it is reading some other values and in the same if i flash the pof file through JTAG and examine through Quartus programmer the data is coming exactly. But if i write the data through micro controller and read back through Quartus programmer it is reading some other values.

So, I think we are able to access the On-Chip flash memory correctly . Here, i see ambiguity in formatting the data while updating through the RSU process and directly over JTAG.

Regards,

Shiva.

[JohnT_Intel]

Hi,

Could you provide me your stp file which have the data you tap? May I know if the data being written to the flash through micro controller is the same as what you Signal Tap?

[Shiva]

Hi,

What i am telling is not through signal tap 2 logic analyzer.

We have implemented a logic to send and receive the data from micro controller to FPGA to on-chip flash memory.

If i send and receive the data using Micro controller to the On-chip flash the whole data is matching exactly with respective its address locations. So, we are able to write and read the data correctly into On-chip flash memory.

But if i flash the code using JTAG and read the data using the Micro controller it is not matching with the POF file.

So, i feel like there is specific format to write the data to on-chip flash memory(like how the JTAG is writing the data to flash memory). We may be missing this format while sending data to On-chip flash memory which may leads it not getting reconfigured.

Can you help me to understand the exact format to be followed while writing the data to flash memory?

Regards,

Shiva.

[JohnT_Intel]

Hi,

I do not think it is format issue as I am not seeing a trend on this. I suspect that there should be other thing that cause the issue. May I know if you are able to use SignalTap to tap the signal to see what you send through micro controller is correctly performed on the Avalon-MM to the on chip flash? The reason is that I am not able to duplicate the issue when I am using JTAG Master to write into the On Chip Flash IP.

[Shiva]

Hi,

I am able to do the signal tapping for Avalon-MM IP. The data what i am sending is exactly writing into the on-chip flash memory. I checked it by taking some random samples in the trigger conditions from the rpd file. Please find the following attachment of stp and rpd file. In stp file i took the data from 0x0E9C location to 0x 0E9F location of rpd file.

when i generated the on-chip flash ip the tool generated one .v file which has the information regarding address locations of different sectors.In that the CFM1 sector starts from 17'h7200 location and ends at 17'hABFF and the CFM2 sector starts from 17'h2000 and ends at 17'h71FF. And i am writing the data in [31:0] pattern to on-chip flash memory. Is there anything wrong in the above memtioned details? I am using Quartus 16.0 lite edition with 10M08SAU169C8G device.

As i mentioned earlier when i write and read the data using the micro controller unit the read out data is exactly matching with the rpd data but if i write the data using MCU and read the data using examine option in the tool the data is not matching. Similarly if i flash the data using JTAG and read back by using the examine the data is matching but if i flash the data using JTAG and read back by using MCU it is not matching. 

I am comparing the process of sending the data through MCU with JTAG because if i flash the code using JTAG and trigger the re-configuration it is re-configuring but not by using the MCU.

What might be the reason for not getting the proper data what we sent though MCU and read back through the examine option.Even, now i checked the data at Avalon-MM IP using signal tap 2 logic analyzer, which is working fine.

Regards,

Shiva.

[JohnT_Intel]

Hi,

May I know what is the different between micro controller unit and the MCU? You mention that the micro controller unit is working correctly but not MCU.

From the SignalTap, you are only tapping the data writedata signal. Is it possible to include the Avalon Address, write, read signal as well so that I can be sure that the timing is correct? I would like to match what you are sending from the MCU is correctly performed on the Avalon MM interface to On Chip Flash. We need to further look into what is actually happening or is there a conversion issue happening when the data is send from MCU to the On Chip Flash.

I understand that you are able to performed read and write from the MCU but the data inside the On Chip Flash is different when it is examine through Quartus programmer. So we will need to make sure that the data send from the MCU is correctly decoded by the Avalon-MM.

[Shiva]

Hi John,

When i tried to write the data repeatedly from MCU and read back by using examine option, 2 times the data was matched with rpd data. After this i triggered the reconfiguration and it worked fine. But most of the times the data writtten by using MCU is not matching with the rpd files.

After this i tried to tap avmm_data_writedata continuously with starting data, this signal is always triggered and giving me the result like the data is going correctly but if i read back by examine the data is not matching.

Is there any chance that will happen in between Avalon-MM IP and on-chip flash?

There is no difference between micro controller unit and MCU i just mentioned it first and used as MCU later.

Please find the following attachment includes write and read operation through Signal tap 2 logic analyzer.

Regards,

Shiva.

[JohnT_Intel]

Hi,

If you look into stp2.stp file, I observed that the avmm_data_write signal is high very long. Is this expected as I expect it to be high for only 1 clock cycle only?

From your testing, it looks like most of the time you are facing data written incorrectly. This means that there is a timing violation where the data might be corrupted due to not handling the data correctly. Have you check your timing analysis to see if there is any timing violation? Are you able to make the changes on your code so that you state machine is more stable when performing write and read?

[Shiva]

Hi,

But in MAX 10 user guide figure4-6 the write signal is high for multiple clock cycles.

Now i changed the code to make write signal high for multiple clock cycles everytime with respective waitrequest signal then performed the write operation by using MCU and read back through examine option and read back data is just like previous not matching with the rpd file.

please find the following attachment of write operation stp file and max10 user guide.

Regards,

Shiva.

[JohnT_Intel]

Hi,

The write signal as long as the wait_request is high the signalTap does not tap this signal.

May I know if you have check on your Quartus design to see if there is any timing violation? Are you able to SignalTap all the Avalon-MM signal and collect the write and read on single address?

[Shiva]

Hi,

There is no timing violation.

please find the attachment of stp files includes write and read operations through Avalon MM IP.

Is there any specific frequency to be followed for On-chip flash memory? Currently i am using 100 MHz frequency.

Signal tap 2 logic analyzer is tapping write signal even wait_request signal is high.

Is there any encryption method to be followed for write operation to on-chip flash memory?

Regards,

Shiva.

[JohnT_Intel]

Hi,

From the address 0x7200 is correct. May I know if the address 0x7201 is correct? May I know if you are able to performed the testing until you observed that the content is incorrect which is matching with the SignalTap?

[Shiva]

Hi,

I got this address from tool generated synthesis folder.

.SECTOR1_START_ADDR         (0), //hex value = 0

.SECTOR1_END_ADDR           (4095), //hex value = FFF

.SECTOR2_START_ADDR         (4096), //hex value = 1000

.SECTOR2_END_ADDR           (8191), //hex value = 1FFF

.SECTOR3_START_ADDR         (8192), //hex value = 2000

.SECTOR3_END_ADDR           (29183), //hex value = 71FF

.SECTOR4_START_ADDR         (29184), //hex value = 7200

.SECTOR4_END_ADDR           (44031), //hex value = ABFF

.SECTOR5_START_ADDR         (44032), //hex value = AC00

.SECTOR5_END_ADDR           (79871), //hex value = 137FF

In this i am using sector4 start address for CFM1 and sector3 start address for CFM2. The above values are in decimal if i convert into hexadecimal it will give 0x7200 is the starting address for CFM1.

No if i signal tap the data read out from the examine it is not responding. But if i give the original rpd data it starts giving the result,which means it is reading back the original data but if we examine through JTAG it is showing different data.

Is there any encryption for reading the data through JTAG for security pupose.

If we assume that the data written correctly but it is not triggering the reconfiguration, what might be the reason for this?

Regards,

Shiva.

[JohnT_Intel]

Hi Shiva,

If you are not able to examine correctly then I do not think that the data is written correctly.

Could you try to write the flash using JTAG and read the CFM1 and CFM2 data out using MCU? I would like to see if you are able to see the similar content just by reading through MCU. This to confirm that your design is working as it is.

[Shiva]

Hi,

No if i flash the data though JTAG and read back by using MCU the data what it is reading is different compared to original data.

what do you suggest from this?

Regards,

Shiva.

[JohnT_Intel]

Hi,

May I know how much different are you observing? I suspect that there is some issue on your IP where it is not converting the data to Avalon-MM correctly. Will need to debug to understand what is actually happening.