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Blogs

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Providing End-to-End Data Protection for AI/HPC/HPDA Workloads

The primary idea behind confidential computing, is to never have unprotected data residing in the me...
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Leading the 224 Gbps PAM4 transceiver ecosystem

Rapid transformation across diverse markets—from edge to core to data center—requires solution provi...
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Chips & Salsa Episodes 34 - 37: Academic Programs and Awards

In this series, CRob and I had the opportunity to talk to some amazing folks who either participated...
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A Commitment to EdTech Excellence

Introducing Intel N Series Education has and continues to be a place for Intel to demonstrate our co...
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Chips & Salsa Episode 33: Fight Ransomware with Intel Threat Detection Technology

Chips & Salsa Episode 33: Fight Ransomware with Intel Threat Detection Technology
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Learn About the Intel® Agilex™ FPGA Portfolio Expansion

The new and expanded Intel Agilex FPGA portfolio covers a wider variety of use cases and application...
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A Human-Centered Approach to Learning and The Education System

Ulcca Joshi Hansen Chief Program Officer at Grantmakers for Education and Author of the Future of S...
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You’re going to want the new Intel® Quartus® Prime Software v22.4. Here’s why

Getting superior performance from hardware-programmable Intel® FPGAs and SoCs requires superlative d...
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SAP accelerates compression workload in POC with Intel® OFS

A recent development project by developers demonstrates how easy it is to accelerate containerized w...
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Medical data anonymization with intelligent AI for the improvement of healthcare

Author: Abhishek Khowala , Principal AI Engineer at Intel Corporation, and Agata Chudzińska, Artific...
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High Bandwidth Memory Can Make CPUs the Desired Platform for AI and HPC

Recent Intel and third-party benchmarks now provide hard evidence that the upcoming Intel® Xeon® pro...
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Postgres Database Performance Benchmark Using HammerDB–DAS vs NVMe over TCP

We aim to run an analytic comparison of throughput via performance benchmarking using the HammerDB P...
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The Origins of the Device Modeling Language (DML)

As mentioned in a previous blog post about the open-sourcing of the Device Modeling Language (DML), ...
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Intel shares update on Heterogeneous Integration and SHIP program at 55th iMAPS Packaging Conference

At the 55th International Symposium on Microelectronics Symposium (iMAPS) held in Boston, Intel’s Jo...
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Intel Adds CXL IP to Intel® Agilex™ FPGA IP Library in the Intel® Quartus® Prime Software v22.3

Intel has just released the Intel® Quartus® Prime Software v22.3. Among several other enhancements, ...
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For more complete information about compiler optimizations, see our Optimization Notice.