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parallel prefix sum OpenCL implementation

I am wondering if anyone knows an efficient parallel prefix sum OpenCL implementation for FPGA. I am currently using the one at CLPP , but it is extremely slow. I guess it makes sense since it was developed earlier for GPU. Anyone knows an open source parallel prefix sum optimized for FPGA? Thanks

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Hi ,

If you have the CUDA code for the prefix sum , then you can convert it to DPC++ and then try to compile the DPC++ code for FPGA.

https://software.intel.com/content/www/us/en/develop/documentation/oneapi-programming-guide/top/soft...

Thanks and Regards

Anil


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