Intel® High Level Design
Support for Intel® High Level Synthesis Compiler, DSP Builder, OneAPI for Intel® FPGAs, Intel® FPGA SDK for OpenCL™
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
723 Discussions

parallel prefix sum OpenCL implementation

beiwang2003
Beginner
‎11-13-2020 08:31 AM
2,615 Views

I am wondering if anyone knows an efficient parallel prefix sum OpenCL implementation for FPGA. I am currently using the one at CLPP , but it is extremely slow. I guess it makes sense since it was developed earlier for GPU. Anyone knows an open source parallel prefix sum optimized for FPGA? Thanks

0 Kudos

Link Copied

2 Replies
AnilErinch_A_Intel
Employee
‎11-18-2020 09:24 PM
2,598 Views

Hi ,

If you have the CUDA code for the prefix sum , then you can convert it to DPC++ and then try to compile the DPC++ code for FPGA.

https://software.intel.com/content/www/us/en/develop/documentation/oneapi-programming-guide/top/software-development-process/migrating-code-to-dpc/migrating-from-cuda-to-dpc.html

Thanks and Regards

Anil


0 Kudos
Copy link
AnilErinch_A_Intel
Employee
‎12-09-2020 07:01 PM
2,545 Views

Hi ,

Please let us know if the previous suggestions was helpful.

So that we can treat this issue as closed.

Thanks and Regards

Anil


0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.