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Hi,
I have a Nios II system with CFI controller (Generic Tri-state controller) at base 0x0 in Qsys. What I've done is to program the CFI flash memory with my Nios II system (hardware image converted from sof2flash with --optionbit, --pfl and .etc) using nios2-flash-programmer tool. After that, I have also program my PFL design into my MAX V device in such a way that upon power cycling my board, the hardware image will be loaded by PFL and configure the FPGA. Although FPGA is successfully configured upon next power cycle as seen from the LED turning green, my problem is that the CFI flash is somehow NOT seen. When I simply tried "nios2-flash-programmer -b 0x0 --debug", it says that NO CFI TABLE FOUND AT 0x0. But if I tried running a simple hello world program in Nios II SBT Eclipse, Hello World was able to be run. What could lead to this failure? The PFL that burnt into the MAX V or my Nios II system design? Thanks, -caridLink Copied
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