data transfer performance of offload and COI (Intel Coprocessor Offload Infrastructure)

[zhou]

If the data transfer performance between CPU and MIC based on COI is better than offload ?

How does COI carry out nocopy option for offload? 
 

[zhou]

I have wrote a program using #pragma offload. The data transfer performance for offload_transfer is about 5-6Gflops.

But when i put this program on other platform. The data transfer performance for offload_transfer is about 2-3Gflops.

The COI is the runtime library of offload and someone told me that rewrite the code using COI could get better data transfer performance.

So since COI is the runtime library of offload, why they could get different data transfer performance.

There is few  material or code based on COI. I have on idea for how to write code using COI replace #pragma offload and how to implement nocopy option for offload.

[jimdempseyatthecove]

On the first system the Xeon Phi may have been in a PCIe x16 slot.

On the second system the Xeon Phi may have been in a PCIe x8 slot.

Jim Dempsey

[zhou]

Thanks for your reply. But i have asked the system  administrator and the second system also is PCIe x16 slot.

jimdempseyatthecove wrote:

On the first system the Xeon Phi may have been in a PCIe x16 slot.

On the second system the Xeon Phi may have been in a PCIe x8 slot.

Jim Dempsey

[TaylorIoTKidd]

What versions of MPSS are on both systems? Are you using the same binary for both or recompiling? Are the versions and configurations of the MIC cards on the two different systems the same? Can you swap the cards to see if the issue moves along with card or has to do with the host system?

[zhou]

I have recompiled the code for different system. I have tried to change thread affinity to control different MIC cards and got the same results. But i can not swap the cards.

The first system:

System Info
HOST OS : Linux
OS Version : 2.6.32-279.el6.x86_64
Driver Version : 3.2.3-1
MPSS Version : 3.2.3
Host Physical Memory : 65917 MB

The second system:

System Info
HOST OS : Linux
OS Version : 2.6.32-279-aftms-TH
Driver Version : 3.4.1-1
MPSS Version : 3.4
Host Physical Memory : 66085 MB

Taylor Kidd (Intel) wrote:

What versions of MPSS are on both systems? Are you using the same binary for both or recompiling? Are the versions and configurations of the MIC cards on the two different systems the same? Can you swap the cards to see if the issue moves along with card or has to do with the host system?

[TaylorIoTKidd]

Given that you've got a two generation difference between your MPSS versions, I'm not sure we can do much for you in terms of identifying the cause of the difference. There are too many variables. Newer versions generally have bug fixes and additional optimizations. I can only recommend that you update MPSS and other Intel Xeon Phi coprocessor (coprocessor and host) to the latest versions. Also update your tools as well, such as the compilers and performance libraries.

Unless you are doing something very unique and application specific, I don't imagine that programming in raw COI would get you any gain.

Here are some sources I got from Bing using the search strings, "phi coi site:software.intel.com" and "phi coi site:edu".

Debugging COI Applications for Intel® Xeon Phi™ Coprocessors

http://inside.mines.edu/mio/mio001/phi/coi/hello_world/hello_world_source.cpp

Also, at Intel® Manycore Platform Software Stack (MPSS):

There is additional documentation in the MPSS packages, more specifically:  man pages and documents in /usr/share/doc/ (see myo, intel-coi* and micmgmt directories).   The  Platform Control Panel User Guide is now in /usr/share/doc/micmgmt/en_US/.

Regards
--
Taylor
 

[zhou]

Thanks for you help. I will update MPSS and compilers for a try.

Taylor Kidd (Intel) wrote:

Given that you've got a two generation difference between your MPSS versions, I'm not sure we can do much for you in terms of identifying the cause of the difference. There are too many variables. Newer versions generally have bug fixes and additional optimizations. I can only recommend that you update MPSS and other Intel Xeon Phi coprocessor (coprocessor and host) to the latest versions. Also update your tools as well, such as the compilers and performance libraries.

Unless you are doing something very unique and application specific, I don't imagine that programming in raw COI would get you any gain.

Here are some sources I got from Bing using the search strings, "phi coi site:software.intel.com" and "phi coi site:edu".

Debugging COI Applications for Intel® Xeon Phi™ Coprocessors

http://inside.mines.edu/mio/mio001/phi/coi/hello_world/hello_world_source.cpp

Also, at Intel® Manycore Platform Software Stack (MPSS):

There is additional documentation in the MPSS packages, more specifically:  man pages and documents in /usr/share/doc/ (see myo, intel-coi* and micmgmt directories).   The  Platform Control Panel User Guide is now in /usr/share/doc/micmgmt/en_US/.

Regards
--
Taylor