Avalon OpenCores MAC 10/100 + µClinux

[Altera_Forum]

Hi all, 

 Sorry for the previous post...  I'm working on the implementation of a Boa embedded webserver using µClinux on the baseboard DBM_3C40 (Cyclone III / Nios II), with a Marvell 88E1119R PHY.  My idea is to use the "Avalon OpenCores 10/100 Ethernet MAC v8.03" so I integrated it in my SOPC Builder design then I generated the *.ptf and a block "cpu" in Quartus to make clearly the pins assignments. Here are some representative screenshots :  http://img22.imageshack.us/img22/5636/sopcbuilder.jpg (http://img22.imageshack.us/img22/5636/sopcbuilder.jpg) http://img200.imageshack.us/img200/2067/quartusdesign1.jpg (http://img200.imageshack.us/img200/2067/quartusdesign1.jpg) http://img40.imageshack.us/img40/1420/quartusdesign2.jpg (http://img40.imageshack.us/img40/1420/quartusdesign2.jpg)  In the "menu makeconfig" kernel configuration, I chose only the following settings :  ------------------------------------------------------------------ Device Drivers --> Network device support ─> ... [*] Network device support [*] Ethernet (10 or 100Mbit) [*] Opencores (Igor) Emac support [*] Generic Media Independant Interface device support (if I don't include this option with Opencores (Igor) Emac support, the compilation "make" fails...) [*] Drivers for Marvell PHY -------------------------------------------------------------------  Finally, I transferred the "zImage" file from Ubuntu to WindowsXP, configured the FPGA with my "webserver_time_limited.sof" and downloaded the µClinux image from the NIOS II 9.0 Command Shell :  [NiosII EDS]$ nios2-terminal  Uncompressing Linux... Ok, booting the kernel. .... eth0: Open Ethernet Core Version 1.0 oeth_probe: 75000 Khz Nios: 16 RX, 16 TX buffs NO Custom HW ALIGN. CONFIG_NIOS2_HW_MULX NOT defined. CONFIG_NIOS2_HW_MUL_OFF NOT defined. BMCR = 1140h. .... /> ifconfig eth0 192.168.1.10 up oeth_phymac_synch:eth0 MR1: 0x0000796D Autoneg'd Link OK: MODER: 0x0000A040 FullD 100BASE-TX /> route add -net 192.168.1.0 netmask 255.255.255.0 eth0 /> boa & [26] /> [30/Nov/1999:00:01:14 +0000] boa: server version Boa/0.94.14rc21 [30/Nov/1999:00:01:14 +0000] boa: server built Jun 30 2009 at 13:23:21. [30/Nov/1999:00:01:14 +0000] boa: starting server pid=27, port 80  I also check the configuration of the network-interface of my PC :  IP-Adress: 192.168.1.1 Subnetmask: 255.255.255.0 Firewall: Disabled  My problem is that I can't ping my PC from/to the µClinux and therefore, I can't access to the simple CGI demo included with uClinux-dist with my browser. I don't understand what i'm doing wrong.... Maybe the final IP configuration ? Or the pins assignments but I check them all twice at least ?? Do you have any ideas of benchmarking "ethernet" tests under µClinux to isolate the problem ? Thanks for your help !  Papy

[Altera_Forum]

Nobody will like to read this. 

( obviously I'm wrong ;) )  please post a short description of your problem.  -Michael

[Altera_Forum]

papyenfurie 

 1) in sopc builder, I believe the igor_mac should be connected to the SRAM or the SDRAM 2) you are missing connections to the etxd[7..0] from the cpu symbol 3)I hope the MDIO symbol you have has an iobuf in there

[Altera_Forum]

<div class='quotetop'>QUOTE (ppitou @ Jul 1 2009, 12:04 PM) <{post_snapback}> (index.php?act=findpost&pid=22982)</div> 

--- Quote Start ---  papyenfurie  1) in sopc builder, I believe the igor_mac should be connected to the SRAM or the SDRAM 2) you are missing connections to the etxd[7..0] from the cpu symbol 3)I hope the MDIO symbol you have has an iobuf in there[/b]  --- Quote End ---    @ ppitou :  thanks you so much for your useful remarks it works perfectly now :rolleyes:  here are some screenshots of the modifications :  1) connecting tx_master and rx_master (igor_mac) to avalon memory mapped slave (SDRAM controller) + connecting control_port (igor_mac) to data_master (nios_cpu)  http://img6.imageshack.us/img6/7224/sdramigormac.jpg (http://img6.imageshack.us/img6/7224/sdramigormac.jpg)  2-3) add "etxd[3..0]" on the output wire + replace the MDIO module (Verilog) with a tristate buffer "tri" from Quartus lib  http://img33.imageshack.us/img33/6571/tristateetxd30.jpg (http://img33.imageshack.us/img33/6571/tristateetxd30.jpg)  Hope it could help someone one day ;)  

[Altera_Forum]

Great, but I would use an "altiobuf" instead of an "tri" ;)

[Altera_Forum]

Hi, 

Im using the same board with the same IP with uClinux but can&#39;t seem to get it working. I dont understand how the marvell chip has an 8bit rx/tx bus but the opencore ethernet MAC IP has only 4 bits rx/tx?  When i start uClinux up and type &#39;ifconfig eth0 up" one of the messages it gives me is jabber... which I think is related to too many packets? Ive tried to connect the system as you have done in your screen shots (I hope thats ok). What did you do with the remaining erxd pins?

[Altera_Forum]

<div class='quotetop'>QUOTE (Gaz @ Jul 30 2009, 10:49 AM) <{post_snapback}> (index.php?act=findpost&pid=23348)</div> 

--- Quote Start ---  Hi, Im using the same board with the same IP with uClinux but can&#39;t seem to get it working. I dont understand how the marvell chip has an 8bit rx/tx bus but the opencore ethernet MAC IP has only 4 bits rx/tx?  When i start uClinux up and type &#39;ifconfig eth0 up" one of the messages it gives me is jabber... which I think is related to too many packets? Ive tried to connect the system as you have done in your screen shots (I hope thats ok). What did you do with the remaining erxd pins?[/b]  --- Quote End ---    I simply connected the remaining etxd pins "etxd[7..4]" to the ground :rolleyes:   Concerning the 8-bits / 4-bits problem, you should take a look on this two pages :  http://en.wikipedia.org/wiki/media_independent_interface (http://en.wikipedia.org/wiki/media_independent_interface) -> used by the OpenCores MAC http://en.wikipedia.org/wiki/gigabit_media...ndent_interface (http://en.wikipedia.org/wiki/gigabit_media_independent_interface) -> used by the Marvell PHY