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System Id mismatch

Altera_Forum
Honored Contributor II
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Everytime I make a change to my sopc system or quartus system and recompile, I am faced with system ID and timestamp mismatches. Even if I regenerate the BSP and ensure that the sopc info file used is the one that the updated version of the system is saved to. Also, I verified that the file had in fact been altered. If i create a new project and BSP from the same file, everything works fine. So it appears that the system settings at the project generation are not being altered when the quartus project is altered. Any clue why this would be happening?? 

 

Chase
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Altera_Forum
Honored Contributor II
926 Views

I´m have the same problem. After QII 10.0 everything change and there isn´t documents explaing the modifications (I couldn´t find anything). 

Does anybody has any clue about this? 

 

Best regards
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Altera_Forum
Honored Contributor II
926 Views

I'm still using Quartus 9.1 sp2

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Altera_Forum
Honored Contributor II
926 Views

I'm having the exact same problem with quartus 10 and nios2eds 10. I have to create a completely new bsp project every time. I get the feeling that this is an environment variable problem - I have a lot of old versions on my machine and it wasn't a clean install. 

 

Any tips would be welcomed...
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Altera_Forum
Honored Contributor II
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In debug configurations I've clicked refresh connections. It complained about some streams being open etc... I said do it anyway and if fixed the issue. Thanks to Jakob Jones for suggesting that in another post somewhere... couldn't find it to link...

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Altera_Forum
Honored Contributor II
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When you compile or change your sopc system, the .sopcinfo file gets altered and you are using the old sopcinfo file to run the Nios II that is why you were getting error. While creating the bsp application again works well because you use new .sopcinfo file.

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Altera_Forum
Honored Contributor II
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Yes I realize this. That is why it is so confusing. When I generate the BSP I am creating from the exact same sopc info file from the exact same location as when I regenerate on an old project. I checked the path many times. It's weird.

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Altera_Forum
Honored Contributor II
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It seems that after changing the sopc image you need to: 

1) Run 'Generate' in sopc. 

2) Compile the quartos 

3) download the main fpga image - this takes 2 requests, since the first time it just notes that the file has changed! 

4) rebuild the bsp 

5) get the jtag debugger/downloader to reread the sopc version, it seems to cache the answer and needs a manual prod - IIRC if you get it to fail to download, there is a button to display the versions, then one to 'refresh' the valuie. 

 

You might be failing at step 5.
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Altera_Forum
Honored Contributor II
926 Views

True. 

 

when you compile your SOPC system, .sopcinfo file gets changed. Therfore, you again need to download the .sof file to the board.
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