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Board Description and Generate problems

Altera_Forum
Honored Contributor II
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I am trying to design a simple system for my custom board with 18 KBytes of on chip memory and a EPCS Controller to hold my firmware. With the ALtera development board I was able to alter the "small" design and add a EPCS controller. I used the flash programmer from the IDE program to download both the FBGA configuration data and the firmware example program "binary_count". It appeared to work. 

However when I tried to develop a system for my customized board with the componets outlined above, I got some serious generate errors. I created a board description with the appropriate information plugged into the FLASH Tab. I even assigned a netlist (so that the system could recognize the appropriate chip I was using) {Later I saw one of the threads that outlined a workaround so that would not have to enter the netlist. I tried this option to designate the target device but I still got my generate problem). I tried editing the class.ptr file but to no avail. I installed service pack 1 but that didn&#39;t help http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/mad.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/mad.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/ohmy.gif . I saw there have been a number of threads written on this topic that raised a similar issue. Did anyone ever find a solution to this problem ? Please if anyone could shed some light on this issue it would be of tremdous help  

 

Note I thought of using the command line tools to prgram the EPCS but I came across the following problem. If I set the target board to "Unspecified Board" then I can generate but when I try to compile n Quartus then I get the following errors for all the ports of my system :- 

 

Error: Port "X" does not exist in macrofunction "Y"  

 

Where X = port names in my instantiation and Y = name of instantiation. However back in SOPC builder when I designate my target board to my customized board with its board description then I get my generate errors back again
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Altera_Forum
Honored Contributor II
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I am afraid I cannot help with your problem. I use "Unspecified Board" in SOPC Builder for our current designs (no netlist or board description) and programm the flash with batch files. 

 

Perhaps this can help you with your Quartus errors www.altera.com/support/kdb/solutions/rd07012002_4102.html (http://www.altera.com/support/kdb/solutions/rd07012002_4102.html) problems.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

originally posted by shmueld@Mar 21 2006, 05:55 AM 

i am trying to design a simple system for my custom board with 18 kbytes of on chip memory and a epcs controller to hold my firmware. with the altera development board i was able to alter the "small" design and add a epcs controller. i used the flash programmer from the ide program to download both the fbga configuration data and the firmware example program "binary_count". it appeared to work. 

however when i tried to develop a system for my customized board with the componets outlined above, i got some serious generate errors. i created a board description with the appropriate information plugged into the flash tab. i even assigned a netlist (so that the system could recognize the appropriate chip i was using) {later i saw one of the threads that outlined a workaround so that would not have to enter the netlist. i tried this option to designate the target device but i still got my generate problem). i tried editing the class.ptr file but to no avail. i installed service pack 1 but that didn&#39;t help  http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/mad.gif   http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/mad.gif   http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/ohmy.gif . i saw there have been a number of threads written on this topic that raised a similar issue. did anyone ever find a solution to this problem ? please if anyone could shed some light on this issue it would be of tremdous help  

 

note i thought of using the command line tools to prgram the epcs but i came across the following problem. if i set the target board to "unspecified board" then i can generate but when i try to compile n quartus then i get the following errors for all the ports of my system :- 

 

error: port "x" does not exist in macrofunction "y"  

 

where x = port names in my instantiation and y = name of instantiation. however back in sopc builder when i designate my target board to my customized board with its board description then i get my generate errors back again 

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--- quote end ---  

 

--- Quote End ---  

 

 

Hi shmueld, 

 

The generation errors you encountered was a bug in 5.1, there are two solutions to the bug. Note if you are only programing a EPCS or flash chip you don&#39;t need a netlist. See board disctription editor chapter in the handbook: http://www.altera.com/literature/hb/qts/qts_qii54015.pdf (http://www.altera.com/literature/hb/qts/qts_qii54015.pdf

You only need to follow the "Flash flow" outlined in the document. 

 

 

1) See the 5.1 eratta -  

http://www.altera.com/support/ip/processor...ware.html#flash (http://www.altera.com/support/ip/processors/nios2/er/51/software/ips-niosii-51-er-software.html#flash

 

This works if you make sure you have exited the tools while editing the PTF file. 

 

2) Download service pack1 for Quartus II and Nios II (these are two seperate service packs - one is for Quartus software the other is for the Nios tools - if you missed one that may be why the service pack didn&#39;t work for you). https://www.altera.com/support/software/dow...oad_center.html (https://www.altera.com/support/software/download/sof-download_center.html

 

Quartus II: 

https://www.altera.com/support/software/dow...s_index_new.jsp (https://www.altera.com/support/software/download/service_packs/quartus/spk-quartus_index_new.jsp

 

Nios II: 

https://www.altera.com/support/software/dow...-nios_index.jsp (https://www.altera.com/support/software/download/service_packs/nios/upd-nios_index.jsp

 

NOTE: When you make a change to a board discription or edit the board&#39;s PTF file be sure to unselect the board (pick a different board) and then reselect the board. Also you should open the EPCS component and make sure the board designator is pointing to the correct component instant name that you created in the board discription file. 

 

I hope this help. 

 

If you still get errors can you post the generation errors that you see, perhaps we might be able to spot what is happening. 

 

Regards, 

-ATJ
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Altera_Forum
Honored Contributor II
207 Views

Dear atjung, 

Thank you for your detailed repsonse. I didn&#39;t realise that there was also a service pack for Quartus II as well. I downloaded and I managed to generate. Thank you so very much for your help on this matter. I am now compiling and i am about to blast my custom board !?  

http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/laugh.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/laugh.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/laugh.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/biggrin.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/biggrin.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif
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