Performance of parallel code Intel64 with large pages
I was wondering if there has been any performance
comparison of the various (or any) MKL or IPP functions on an Intel64 platform
using large Linux pages (2MiB) vs the "standard" 4KiB pages.
are several benefits when large pagers are used, including the
reduction in TLB miss rates and the larger space for pre-fetching (2MiB
I was wondering if there is any other way to utilize large pages besides the hugeTLBfs library.
other systems one can specify the page size per segment and can obtain
tangible speedups in applications suffering from TLB shortages. On that
note a smaller page size (eg, 64 to 128 KiB) would be preferrable as a
better alternative to 2MiB (or the 1GiB) page size.
Is there any direction in Intel to make large pages more easily accessible to apps ?