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Question on loads, stores and LLC miss count in Memory Access


Hi, all.

I have been trying to profile memory access of an application using VTune.

And I have the following questions about loads, stores and LLC miss count.


1. Does load and store count represents loads/stores that occurred in LLC only? or does it counts every single load and store in L1, L2 and LLC?


2. I think LLC miss count should be the same with the DRAM access count, but what I got is DRAM access count is larger than LLC miss count. What would make this situation?


I attached the images for each question. 

Thanks for answering in advance.

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