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Understanding to CPU Time and Instructions retired

zhi_c_
Beginner
138 Views

Hi All,

The following is the snapshot from VTune on my Haswell processor. However, I don't understand that why the CPU time and the number of instructions retired for the highlighted code (vpbroadcastq) are so significantly greater than the others in the same basic block. I thought the number of the retired instructions should be not too different, though there might be cache misses or TLB misses. Can someone explain some possible reasons for it? Thanks.

vtune.png

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2 Replies
Peter_W_Intel
Employee
138 Views

I think this topic is Hardware Event Skid relevant - please see this 

You may find performance data refelcting to source line.

zhi_c_
Beginner
138 Views

Thanks for your link, Peter. But the question is that the highlighted instruction is in the middle of the basic block. Why the recording of the other instructions before/after it is not affected if this is due to hardware event skid? 

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