Three Intel technologists have been named Institute of Electrical and Electronics Engineers (IEEE) Fellows for their extraordinary accomplishments and vital contributions to the advancement or application of engineering, science and technology. IEEE is the world’s largest technical professional organization dedicated to advancing technology innovation and excellence for the benefit of humanity.
The IEEE Fellow status recognizes exceptional distinction in the engineering profession and significant value to society. Candidates come from government, academia and industry sectors. The IEEE board of directors confers the honors. Nominees are evaluated on individual technical or educational contributions to the engineering field, the impact of their contributions and the verifiable evidence supporting the case. This may include significant industry publications, patents, presentations or standards committee work.
Just 0.1% of the total voting membership can be elevated to IEEE Fellow each year. Industry recognition of the outstanding contributions of Intel technologists enhances Intel’s leadership within the engineering ecosystem. Technical insights and solutions gained from industry impact have a direct benefit to Intel.
Meet Intel’s new IEEE Fellows
Harald Gossner was elevated to IEEE Fellow for contributions to ESD design of advanced IC devices and high-speed systems.
Harald Gossner is senior principal engineer at DEG PESG, where he is leading the system (ESD) activities for Intel products. Harald Gossner was elevated to IEEE Fellow for contributions to ESD design of advanced IC devices and high-speed systems.
He received his degree in physics from Ludwig-Maximilians-Universität in Munich in 1990 and his Ph.D. in electrical engineering from the Universität der Bundeswehr in Munich in 1995. For 15 years he worked on the development of ESD protection concepts with Siemens and Infineon Technologies. He joined Intel in 2011.
Harald has authored and co-authored more than 150 technical papers and two books in the field of ESD and device physics. He also holds 110 patents in the field. He was the recipient of the best paper awards of EOSESD Symposium in 2005, 2012, 2017 and 2018. In 2015, he received the Outstanding Achievement Award of ESD Association for his technical contributions. He served as technical program chair and general chair of EOSESD Symposium and the International ESD Workshop. In 2006, he became co-founder and co-chair of the Industry Council on ESD Target Levels, an international board of more than 60 companies. He is member of the board of directors of ESD Association and became its president in 2022. He also is editor of IEEE Electron Device Letters.
He is a member of the Bundesfachkommission Intern & Digitales and Bundesfachkommission Künstliche Intelligenz of the German Economic Council. He is also technical adviser of the Bavarian Ministry of Commerce for the program electronic systems and process technology. As member of the European Ecosystem Steering group at Intel Germany, he helped establish an R&D and design ecosystem for leading-edge CMOS technologies in Europe.
Muhammad M. Khellah was elevated to IEEE Fellow for contributions to design technology co-optimization of on-die dense memory and fine-grain power management circuits.
Muhammad M. Khellah is a research scientist at Intel Labs, where he currently leads research on power management, design technology co-optimization and application-driven hardware acceleration.
After receiving his Ph.D. from the University of Waterloo, Canada, in 1999, Muhammad joined Technology Development (TD) and led the design of on-die SRAM caches for the Pentium microprocessor product line.
Muhammad received an Intel Achievement Award in 2012 as part of a joint effort by Intel Labs and TD to enable continued SRAM scaling at Intel and the industry. Muhammad serves now on the EC of ISLPED, and previously served as associate editor for TCAS-I, special-issue editor for JSSC, TPC and general co-chair of ISLPED, special-sessions chair of CICC, and as a TPC member of ISSCC. He has published 107 technical papers, and has 126 patents granted, and a few pending.
Muhammad is an active mentor of Intel-sponsored university research and was presented the 2018 Mahboob Khan Outstanding Liaison Award for his efforts.
Sriram Vangal was elevated to IEEE Fellow for contributions to network-on-chip architectures.
Sriram Vangal is a principal engineer with Intel Labs researching AI-driven, in-situ silicon anomaly detection approaches to improve silicon reliability.
He joined Intel in 1995 and has played a lead role in multicore CPU development incorporating network-on-chip (NoC) architectures and resilient near-threshold voltage (NTV) computing research.
He earned his B.E. degree from Bangalore University in India in 1993, his M.S. from the University of Nebraska-Lincoln in 1995 and his Ph.D. from Linköping University in Sweden in 2007 – all in electrical engineering.
Sriram has received two Intel Achievement Awards for his work, and an Intel Labs Gordon Moore Award. He has served on the ISSCC Technology Directions subcommittee, ISSCC TPC and a special-issue editor for JSSC. He has published more than 50 conference and journal papers, authored three book chapters on high-performance NoCs and energy-efficient NTV designs, and has more than 45 patents issued, with more than 20 pending.
A trackable reference of Intel employees who have attained fellow status in industry organizations can be found at fellows.intel.com. (This list is self-reported and may be incomplete. Additions can be sent directly to the Intel Technologists Office.)
For news, resources and tools for technologists, visit the Technologists at Intel site at goto/technologists.
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