The future of RAN is on standard compute
As operators look at their network architecture of choice, it is important to consider where the future of compute is going. Ultimately, the focus must be on which architecture will deliver the best outcome for operators.
If you are in the Telco industry, the terms virtualized RAN and Open RAN are more than familiar to you. By now, the entire industry recognizes that network architectures must evolve to support new use cases, new monetizable services, and to deliver a better user experience – all while reducing total cost of ownership (TCO).
That’s why more than 10 years ago, Intel and its ecosystem partners and customers began a collaborative journey to transform networks into a software-defined architecture that could deliver the benefits of programmability, flexibility, and scale at lower TCOs. We have already seen these benefits materialize for the network core, with Dell’Oro forecasting core network virtualization reaching the 90% mark in 20231. Now we see the growing momentum of virtualized RAN, with Tier-1 operators deploying commercial greenfield and brownfield networks at scale, nearly all of which are running on Intel architecture.
Today, our industry has reached the point of no return. There is no going back. Virtualization of the network, end-to-end, is a reality today. We have accomplished a lot as an industry, but the journey is not over.
RAN workloads are complex and heterogenous. Layer 1 in particular is highly compute intensive. It’s no wonder that until recently, most of the world’s radio access networks were implemented as proprietary fixed-function appliances. This was based on operators’ belief that Layer 1 was so demanding in compute and performance that it could not be defined in software. Fortunately, that myth is behind us. This is where Intel technology and architecture comes in.
Everything starts with the right architecture and the evolution of that architecture
At Intel, we saw the movement toward software-defined infrastructure coming and invested heavily, understanding that our ambitions for the network needed an open common platform based on General Purpose Processors with all the benefits of a server and cloud economy of scale that hyperscalers have taught us so well, and where millions of developers around the world could bring unlimited innovation.
Over the last decade, we’ve shown the world that virtualizing the RAN on general purpose Intel® Xeon® processors is not only possible, but also competitive in terms of power and performance compared to traditional RAN. The proof is visible in real-world commercial deployments around the globe. Take for example Verizon’s public comments on their milestone of deploying 7,000 virtualized cell sites in the U.S.:
“customers benefit from greater flexibility, faster delivery of services, greater scalability, and improved cost efficiency in networks.”
And now, Intel is taking its architecture to the next level.
To handle the demanding needs of the RAN, including Layer 1, we have built an architecture based on a flexible, programmable general-purpose chip, integrated with acceleration for the most demanding tasks. This architecture enables operators to deploy a fully virtualized RAN without compromises and reap the full benefits of having a software-defined network end to end.
At MWC 2023, we will announce our 4th Gen Intel® Xeon® Scalable processors with Intel® vRAN Boost - the first processor to fully integrate Layer 1 vRAN acceleration into the CPU. This design innovation eliminates the need for a custom accelerator card, allowing operators to consolidate all base station layers on a common, virtualized platform.
With this latest Intel Xeon processor generation, we are able to deliver up to twice the capacity within the same power envelope for vRAN workloads compared to our 3rd Gen Intel Xeon processors—allowing operators to effectively double their performance-per-watt2. Additionally, by not requiring any external acceleration card, operators will gain roughly an additional 20% reduction in vRAN compute power consumption3.
We expect our 4th Gen Xeon Scalable Processors with vRAN Boost will match or better the performance-per-watt of the best Layer 1 SoC accelerator cards when those enter the market.
Delivering architecture rooted in a deep understanding of RAN workloads
Intel’s vRAN solution and acceleration have evolved considerably over time. Several years ago, we started with acceleration techniques running on FPGAs, then progressed to leveraging our eASICs capabilities. Today, Intel is offering what is considered a game changer in the industry: acceleration that is fully integrated in the CPU with our 4th Generation Intel® Xeon® Scalable processors with Intel® vRAN Boost.
RAN workloads are indeed demanding and require acceleration. However, to maximize flexibility, the acceleration must be tightly coupled with the CPU. With our new 4th Gen Intel Xeon processor with Intel vRAN Boost, this is precisely what we have done – we created a general-purpose processor that combines compute, acceleration and networking into a single die and delivers all of the features needed for vRAN workloads without the complexity and supply chain required for multi-part platforms.
This architecture allows operators to meet their demanding KPIs (e.g. capacity, coverage, quality, reliability, security) and TCO requirements (e.g. performance-per-watt, CapEx and OpEx costs) while underpinning their networks on a modern, cloud-ready and software-defined architecture. This allows them to grow, automate, and innovate with software upgrades, thereby significantly increasing their return on investments.
As we move forward, Intel’s product roadmap will increasingly integrate all vRAN elements and components in a single SoC or System-on-a-Package. With this approach, operators will be not only leveraging the best vRAN architecture available today, but also adopting the compute architecture of the future. In the process, they can ride the coat tails of the billions of dollars invested in new CPUs every year.
Also with this approach, we expect Intel vRAN solutions to provide operators with market-leading TCO that exceeds any L1 SoC external acceleration card in the market.
Heterogeneous platforms: the future of compute
For too long now, we have spent too much energy talking about “Inline vs. Lookaside” acceleration. The reality is that with full integration of vRAN acceleration into the CPU, this conversation is now irrelevant. External acceleration, such as found in L1 SoC external cards, is simply the “old way.” It is proprietary; it is limiting--and it is not cloud native.
Simply put, external acceleration goes in the opposite evolutionary direction of where compute is headed.
Integrated acceleration in a single-chip SoC or System-on-a-package, such as the solutions provided by Intel, provide all the benefits of a server economy of scale, cloud-native support, open software, and a western supply chain. This approach aligns with the future of compute and gives operators the best business outcome.
The future of compute is heterogeneous platforms that integrate the right combination of general purpose processors, acceleration, networking and memory into a single SOC or in the future system on a package to deliver the best combination of flexibility, performance and power efficiency. We see this happening across the entire landscape from mobile to edge to cloud and Intel is already delivering on this vision with our SPR-EE SOC and we will have more to come in this direction in the near future.
This is true not only for vRAN, but for all workloads, including AI, media, and high-performance computing. Going forward, acceleration will be packaged inside the CPU rather than in a separate card. This is where operators want to be for their future.
Visit Intel.com/vRAN to learn more about Intel’s vRAN solutions portfolio.
Additional Resources:
Verizon-Ericsson Paper – “Cloud RAN Acceleration Technology”
Intel Blog – “The Future of RAN is Virtualized and Open”
1. Dell'Oro report published in Jan. 2023, "Mobile Core Network & Multi-Access Edge Computing Quarterly Report" + Intel internal analysis
2. Estimated as of 12/06/2022 based on 4th Gen Intel® Xeon® Scalable processor as compared to 3rd generation Intel Xeon Scalable at similar core count, socket power, and frequency, using a FlexRAN test scenario. Results may vary. Performance varies by use, configuration and other factors.
3. Estimated as of 12/06/2022 based on scenario design power (SDP) analysis on pre-production 4th Generation Intel® Xeon® Scalable processor with Intel® vRAN Boost and pre-production 4th Generation Intel® Xeon® Scalable processor with external 5G accelerator card, at same core count and frequency. Performance and power varies by use, configuration and other factors.
Notices & Disclaimers
Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex
Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available updates. See backup for configuration details. No product or component can be absolutely secure.
Results have been estimated or simulated.
© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others.
Vice President Network & Edge Group
General Manager Wireless Access Network Division.
Cristina Rodriguez is vice president in the Network & Edge Group, general manager of the group's Wireless Access Network Division (WAND), and general manager of the Austin Design Center at Intel Corporation. She leads Intel’s efforts to provide innovative wireless access solutions in both traditional and cloud native networks, enabling the RAN of the future by bringing together 5G, the build out of the Edge and Artificial Intelligence. Rodriguez has full PnL ownership, responsible for strategy and business plans, technical product marketing, roadmaps, product definition, forecasting, customer relationships, investment decisions and GTM.
Rodriguez joined Intel in 2014 with the acquisition of LSI Corp.'s Axxia Networking Business from Avago Technologies Ltd., where she led and carried out software strategy. In her first Intel role, Rodriguez managed the division's worldwide software engineering and product development efforts. She also led the successful integration of the Axxia team into Intel and aligned the team's focus with Intel's networking business. Her team has been recognized multiple times with Intel’s highest honor, the Intel Achievement Award, for their contribution to the company’s 5G leadership efforts.
Before her tenure at LSI and Avago, Rodriguez spent seven years holding leadership roles in software development at Agere Systems Inc. and its parent company, Lucent Technologies Inc. Earlier in her career, she worked at Zilog Inc. and at two startup ventures.
Rodriguez earned her bachelor's degree in electrical engineering from Instituto Superior Politécnico José Antonio Echeverría in Havana, Cuba; her master's degree in computer science from Universidad Politécnica de Madrid in Madrid, Spain; and completed the Stanford Executive Program at Stanford University. Rodriguez is also a member of the Intel Latinx Leadership Council and was recognized as one of HiTEC’s “100 Most Influential Hispanic Leaders in Technology” in 2021 and 2022.