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LDean
Novice
2,877 Views

I210 External Flash Programming with a Tegra X2

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This is the 3rd group I've asked for help on this from, so hopefully I can condense the problem without leaving anything out. I've making a carrier card for a Tegra X2 computer on module (running Linux 4.4.38-tegra aarch64) and using the Intel I210 to get a second Ethernet port. I've verified that the I210 works with the Tegra using an external Flash chip programmed before putting it on the board with an image copied from an I210 adapter card Flash. To make it easier to manufacture I'd like to program the Flash in-circuit rather than try to make our pre-programming less hokey and it sounds like like Intel's got a more elegant solution than the one's I'm looking at otherwise. I've seen the BootUtil and EEUPDATE used to program the Flash and have been trying both. I'm new to Intel and Linux so its difficult to know what to ask and where I'm missing information.

I tried the EEUPDATE first as I could follow the instructions better but I've found where the two overlap with the iqvlinux.ko module file. Is one of these better for an application like this? (I'll leave the question as I'm not sure where else to ask it if I need it) I've found the install file in both and (after logging in to root using sudo -i) used the install file to create a new iqvlinux.ko module file. I've used modprobe to install the module (both at seperate times to see if one worked better than the other) and it comes up in the lsmod list of installed modules after installing it. From the user's guides, I get the idea that both BootUtil and EEUPDATE commands, when used without an options, should give me a list of devices rather than say they aren't recognized. After a reboot the the ipqvlinux.ko module doesn't show up in the lsmod until it's reinstalled.

The I210 shows up as an un-programmed device as shown below. With the external Flash programmed with an image transfered from an adapter card using the I210 PHY the device works perfectly providing Gigabit Ethernet to the Tegra.

nvidia@lamont-tx2|~> lspci

00:01.0 PCI bridge: NVIDIA Corporation Device 10e5 (rev a1)

01:00.0 Ethernet controller: Intel Corporation Device 1531 (rev 03)

Can BootUtil or EEUPDATE or some other tool help me program the Flash in-circuit? Is there something I'm missing in the process that's keeping the tools from working? (As I'm looking at the guide for the BootUtil I'm wondering if I should chase down the "Assign an IP address using ifconfig command.")

I've posted with the Wired Ethernet (case# https://na37.salesforce.com/5000P00000eIKDS?fromEmail=1&s1oid=00DU0000000YT3c&s1nid=000000000000000&... 03145041) and then Resource and Design Center (case# 03146265) so hopefully this will be the post that can help me with this.

Thanks in advance for your help.

LaMont

0 Kudos
1 Solution
MStic2
Beginner
578 Views

Hi LaMont,

on our X2 we use version 0.9.9+r1954 of the flashrom tool together with the the attached patch, that adds i210 support.

You can call it like shown in the following two lines. The first enables the PCI device and the second is the call to flashrom.

echo 1 | sudo tee /sys/bus/pci/devices/0000\:01\:00.0/enable

sudo flashrom -VVVV -p nicintel_spi:pci=01:00.0 -c LE25FU406C/LE25U40CMC -w Dev_Start_I210_Copper_NOMNG_4Mb_A2_3.25_0.03.bin

You can remove the option "-c LE25FU406C/LE25U40CMC", which tells flashrom to throw an error if it finds another flash chip:

echo 1 | sudo tee /sys/bus/pci/devices/0000\:01\:00.0/enable

sudo flashrom -VVVV -p nicintel_spi:pci=01:00.0 -w Dev_Start_I210_Copper_NOMNG_4Mb_A2_3.25_0.03.bin

Best regards

Michael

View solution in original post

11 Replies
CarlosAM_INTEL
Moderator
578 Views

Hello, LaMont:

Thank you for contacting Intel Embedded Community.

In order to be on the same page, could you please tell us if the affected design has been developed by you or a third-party company? In case it is a third party design, could you please let us know where all the information related to it can be found? If it is your design, could you please let us know if it has been reviewed by Intel? Also, could you please verify that you have implemented the guidelines stated at the answers to the questions 2.9, 2.10, and 2.23; on pages 6, 7, and 9 of thehttps://www.intel.com/content/dam/www/public/us/en/documents/faqs/ethernet-controller-i210-i211-faq.... Intel(R) Ethernet Controller I210/I211 Frequently Asked Questions (FAQs) document # 335346?

Waiting for your update with all the info0rmation that should answer these questions.

Best regards,

Carlos_A.

LDean
Novice
578 Views

Hello Carlos,

Thank you for the prompt response.

We developed the design ourselves (I took the project over in time to replace a Realtek PHY with the Intel PHY).

The design hasn't been reviewed by Intel but I relied heavily on the reference design and compared it to an Ethernet adapter card we have that uses the I210. With the image we copied from the adapter cards flash memory the design works well. Iperf testing says we're getting Gigabit speeds out of it.

Questions 2.9: We have the I210 implemented with an external flash memory device, the Microchip SST26VF016B-104V/SN which is their suggested replacement to the SST25VF040B from the I210 reference design. My understanding is that we need the autonomous external PHY control via MDIO that means we need the external flash. We also need the -40°C to 85°C temperature range of the IT version which I don't know that I've seen for the I211.

Question 2.10: I haven't gotten far enough through updating the flash to need to worry about resetting the I210. Granted, I'm still not entirely sure what I should be expecting at each stage but from the user's guide I'm expecting to have the install file get me setup with the BootUtil or EEUPDATE tool which will let me program and image into the flash. So far I've gotten a new iqvlinux.ko module file from running the install file and installed this module into the kernel but I don't get any access to the BootUtil or EEUPDATE tools (I've tried both)

Question 2.23: The flash memory is powered from the same source so hopefully we don't have a race condition between the I210 initialization and the flash power up but with the flash programmed the design hasn't shown any problems with the I210 yet. Pin 12 is pulled up but I have a pads to pull it low if I need to but with the pre-programmed flash I haven't had any signed firmware security problems.

Thank you for your help with this.

LaMont

LDean
Novice
578 Views

Re-looking at a Preboot Setup.txt file about using and insatlling the BootUtil tool, that I don't remember where it came from, under installing on Linux says:

INSTALLING THE TOOL ON LINUX*

=============================

In order to run this tool on Linux*, the base driver must be installed on

the system.

I didn't think much about this but a google search says there's an Intel Base Driver "https://www.intel.com/content/www/us/en/support/articles/000006866/network-and-i-o/ethernet-products... Linux* e1000 Base Driver Overview and Installation". I'm going to try this next.

CarlosAM_INTEL
Moderator
578 Views

Hello, LaMont :

The information that may help you is stated in the answers to the questions 2.14, 2.15, 2.16, and 2.25 of the https://www.intel.com/content/dam/www/public/us/en/documents/faqs/ethernet-controller-i210-i211-faq.... Intel(R) Ethernet Controller I210/I211 Frequently Asked Questions (FAQs) document # 335346.

By the way, please review the information stated in the Intel(R) EEUpdate Release Notes included in the https://cdrd.intel.com/v1/dl/getcontent/348742 Intel Network Connections Tools 22.9 PV LAN Software Tools document # 348742. This document is accessible when you are logged on your Embedded Design Center (EDC) privileged account.

In case that you needed, the Intel Ethernet Controller I210 and I211- AT Production NVM Images document # 513655 can be found at the following website using your EDC privileged account as well:

https://cdrd.intel.com/v1/dl/getcontent/513655?asset=8246 https://cdrd.intel.com/v1/dl/getcontent/513655

We hope that this information may help you.

Best regards,

Carlos_A.

LDean
Novice
578 Views

Hey Carlos,

That's good to know that EEUPDATE is the tool to focus on. So my question has changed to why my EEUPDATE doesn't seem to be installing properly.

I got my original EEUPDATE installation from the 348742 document but I downloaded a new copy to play with. I was trying the "Linux_x64 (x64)/OEM_Mfg", so I went through the list to be thorough (nice they share names so I mostly just wore off some plastic from my up arrow key). I've included below what I've been doing trying to follow the directions from the "eeupdate.txt" file in the installation files. I login as root, copy the files, run the install file and get a "command not found" when I try to use EEUPDATE with no options. Unpacking the tar gets the same results. installing the .ko file with modprobe does the same. The installs all show success but they don't get my an EEUPDATE (or eeupdate) command. I tried installing from the directories in my Download directory in case the install needed some of the other files in those directories. I haven't copied the directories into root but ... Hopefully there's some small piece I'm missing and things will break loose soon so I can move into using the EEUPDATE tool itself.

Installation directions:

This is the installation procedure:

1. Log in as root and create a temporary directory to build the Intel(R)

Network Connection Tools driver.

2. Copy 'install' and 'iqvlinux.tar.gz' to the temporary directory.

There are 3 versions of Linux supported: Linux32 (x86), Linux_x64 (x64),

and Linux64 (Itanium). Copies of the above files exist in the appropriate

directory for your platform.

3. CD to the temporary directory and run './install.' The driver has been

installed now, so the files in the temporary directory can be removed.

4. Copy the tools that you want to use from the appropriate directory of

the CD.

Usage directions:

BASIC USAGE GUIDELINES

----------------------

To display a list of installed adapters call EEUPDATE without any parameters

as follows:

EEUPDATE

EEUPDATE will display a list of network adapters installed in the system

similar to the following:

[EEUPDATE ver 5.0.1.0] - Intel PCI NIC EEPROM Utility

Copyright (C) 1995 - 2004 Intel Corporation

Intel (R) Confidential and not for general distribution.

Warning: No Adapter Selected

NIC Bus Dev Fun Vendor-Device Branding string

=== === === === ============= =================================================

1 1 00 00 8086-1008 Intel(R) PRO/1000 XT Server Adapter

2 1 08 00 8086-1039 Intel(R) PRO/100 VE Network Connection

Activity:

root@lamont-tx2|~> mkdir Temporary

root@lamont-tx2|~> ls

Temporary

root@lamont-tx2|~> cp /home/nvidia/Downloads/Linux_x64/OEM_Mfg/install /root/Temporary/

root@lamont-tx2|~> cp /home/nvidia/Downloads/Linux_x64/OEM_Mfg/iqvlinux.tar.gz /root/Temporary/

root@lamont-tx2|~> cd Temporary/

root@lamont-tx2|Temporary> ls

install iqvlinux.tar.gz

root@lamont-tx2|Temporary> ./install

Extracting archive..OK!

Compiling the driver...OK!

Removing existing iqvlinux.ko driver...OK

Copying iqvlinux.ko driver file to /lib/modules directory...OK!

Driver installation verification...Installed!

root@lamont-tx2|Temporary> EEUPDATE

-bash: EEUPDATE: command not found

root@lamont-tx2|Temporary> eeupdate

-bash: eeupdate: command not found

root@lamont-tx2|Temporary> tar xzvf iqvlinux.tar.gz

./

./COPYING

./inc/

./inc/nalioctl.h

./inc/cardbus_t.h

./inc/linux/

./inc/linux/linuxnalioctl.h

./inc/linux/linuxnaldriver.h

./inc/linux/linuxmemory.h

./inc/linux/linuxpci_i.h

./inc/linux/linuxdefs.h

./inc/linux/linuxos_i.h

./inc/linux/files.txt

./inc/linux/linuxtypes.h

./inc/pci_i.h

./inc/nalcodes.h

./inc/os_i.h

./inc/pci_t.h

./inc/nalbytes.h

./inc/nal.h

./inc/naltypes.h

./inc/files.txt

./inc/hwbus_t.h

./inc/osdevice_i.h

./src/

./src/linux/

./src/linux/driver/

./src/linux/driver/linuxdrivermemory_i.c

./src/linux/driver/linuxdriverpci_i.c

./src/linux/driver/linuxnaldriver.c

./src/linux/driver/Makefile

./src/linux/driver/nalioctldrv.c

./src/linux/driver/nalinstall

./src/linux/driver/iqvlinux.spec

./src/linux/driver/linuxdriveros_i.c

./src/linux/driver/linuxdriverdevice_i.c

./src/linux/driver/files.txt...

MStic2
Beginner
579 Views

Hi LaMont,

on our X2 we use version 0.9.9+r1954 of the flashrom tool together with the the attached patch, that adds i210 support.

You can call it like shown in the following two lines. The first enables the PCI device and the second is the call to flashrom.

echo 1 | sudo tee /sys/bus/pci/devices/0000\:01\:00.0/enable

sudo flashrom -VVVV -p nicintel_spi:pci=01:00.0 -c LE25FU406C/LE25U40CMC -w Dev_Start_I210_Copper_NOMNG_4Mb_A2_3.25_0.03.bin

You can remove the option "-c LE25FU406C/LE25U40CMC", which tells flashrom to throw an error if it finds another flash chip:

echo 1 | sudo tee /sys/bus/pci/devices/0000\:01\:00.0/enable

sudo flashrom -VVVV -p nicintel_spi:pci=01:00.0 -w Dev_Start_I210_Copper_NOMNG_4Mb_A2_3.25_0.03.bin

Best regards

Michael

View solution in original post

LDean
Novice
578 Views

Hi Michael,

Thank you for the your help. Flashrom recognizes the I210 and the Microchip SST25VF040B (which I happened to have, it didn't recognize the SST26VF016B that I had in the design). It isn't removing the Block Protection and so won't program I've emailed the flashrom folks per their output comments and have included a copy of the output below. So flashrom seems to be the answer once it's over this last set of hurtles. So if you have any experience or ideas about why it wouldn't be unlock the ...25VF040... or experience with getting flashrom to recognize a new flash chip, that would be great. If you can share the variety of flash chip you're using that would be awesome too (especially if its footprint compatible). Otherwise, I guess my question is answered and I again thank you for your help.

LaMont

... flashrom> sudo flashrom -VVVV -p nicintel_spi:pci=01:00.0 -c SST25VF040B -w Dev_Start_I210_Copper_NOMNG_4Mb_A2_3.25_0.03.bin

flashrom v0.9.9-r1954 on Linux 4.4.38-tegra (aarch64)

flashrom is free software, get the source code at https://flashrom.org

flashrom was built with libpci 3.3.1, GCC 5.4.0 20160609, little endian

Command line (7 args): flashrom -VVVV -p nicintel_spi:pci=01:00.0 -c SST25VF040B -w Dev_Start_I210_Copper_NOMNG_4Mb_A2_3.25_0.03.bin

Calibrating delay loop... OS timer resolution is 1 usecs, 2531M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1001 us, 10000 myus = 10022 us, 4 myus = 4 us, OK.

Initializing nicintel_spi programmer

Found "Intel Unprogrammed i210 Gigabit Ethernet Controller" (8086:1531, BDF 01:00.0).

===

This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output

to mailto:flashrom@flashrom.org flashrom@flashrom.org if it works for you. Please add the name of your

PCI device to the subject. Thank you for your help!

===

PCI header type 0x00

Requested BAR is of type MEM, 32bit, not prefetchable

PCI header type 0x00

Requested BAR is of type MEM, 32bit, not prefetchable

page_size=1000

pre-rounding: start=0x0000000050800000, len=0x1000, end=0x0000000050801000

post-rounding: start=0x0000000050800000, len=0x1000, end=0x0000000050801000

The following protocols are supported: SPI.

Probing for SST SST25VF040B, 512 kB: programmer_map_flash_region: mapping SST25VF040B from 0x00000000fff80000 to 0x0000000000000000

RDID returned 0xbf 0x25 0x8d. probe_spi_rdid_generic: id1 0xbf, id2 0x258d

Found SST flash chip "SST25VF040B" (512 kB, SPI) on nicintel_spi.

Chip status register is 0x1c.

Chip status register: Block Protect Write Disable (BPL) is not set

Chip status register: Auto Address Increment Programming (AAI) is not set

Chip status register: Block Protect 3 (BP3) is not set

Chip status register: Block Protect 2 (BP2) is set

Chip status register: Block Protect 1 (BP1) is set

Chip status register: Block Protect 0 (BP0) is set

Chip status register: Write Enable Latch (WEL) is not set

Chip status register: Write In Progress (WIP/BUSY) is not set

Resulting block protection : all blocks

programmer_unmap_flash_region: unmapped 0x0000000000000000

programmer_map_flash_region: mapping SST25VF040B from 0x00000000fff80000 to 0x0000000000000000

Some block protection in effect, disabling... Block protection could not be disabled!

Chip status register is 0x1c.

Chip status register: Block Protect Write Disable (BPL) is not set

Chip status register: Auto Address Increment Programming (AAI) is not set

Chip status register: Block Protect 3 (BP3) is not set

Chip status register: Block Protect 2 (BP2) is set

Chip status register: Block Protect 1 (BP1) is set

Chip status register: Block Protect 0 (BP0) is set

Chip status register: Write Enable Latch (WEL) is not set

Chip status register: Write In Progress (WIP/BUSY) is not set

Resulting block protection : all blocks

Reading old flash chip contents... done.

Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:W, 0x001000-0x001fff:S, 0x002000-0x002fff:W, 0x003000-0x003fff:W, 0x004000-0x004fff:W, 0x005000-0x005fff:W, 0x006000-0x006fff:W, 0x007000-0x007fff:W, 0x008000-0x008fff:W, 0x009000-0x009fff:W, 0x00a000-0x00afff:W, 0x00b000-0x00bfff:W, 0x00c000-0x00cfff:W, 0x00d000-0x00dfff:W, 0x00e000-0x00efff:W, 0x00f000-0x00ffff:W, 0x010000-0x010fff:W, 0x011000-0x011fff:W, 0x012000-0x012fff:W, 0x013000-0x013fff:W, 0x014000-0x014fff:W, 0x015000-0x015fff:W, 0x016000-0x016fff:W, 0x017000-0x017fff:W, 0x018000-0x018fff:W, 0x019000-0x019fff:W, 0x01a000-0x01afff:W, 0x01b000-0x01bfff:W, 0x01c000-0x01cfff:W, 0x01d000-0x01dfff:W, 0x01e000-0x01efff:W, 0x01f000-0x01ffff:W, 0x020000-0x020fff:W, 0x021000-0x021fff:W, 0x022000-0x022fff:W, 0x023000-0x023fff:W, 0x024000-0x024fff:W, 0x025000-0x025fff:W, 0x026000-0x026fff:W, 0x027000-0x027fff:W, 0x028000-0x028fff:W, 0x029000-0x029fff:W, 0x02a000-0x02afff:W, 0x02b000-0x02bfff:W, 0x02c000-0x02cfff:W, 0x02d000-0x02dfff:W, 0x02e000-0x02efff:W, 0x02f000-0x02ffff:W, 0x030000-0x030fff:W, 0x031000-0x031fff:W, 0x032000-0x032fff:W, 0x033000-0x033fff:W, 0x034000-0x034fff:W, 0x035000-0x035fff:W, 0x036000-0x036fff:W, 0x037000-0x037fff:W, 0x038000-0x038fff:S, 0x039000-0x039fff:S, 0x03a000-0x03afff:S, 0x03b000-0x03bfff:S, 0x03c000-0x03cfff:W, 0x03d000-0x03dfff:W, 0x03e000-0x03efff:W, 0x03f000-0x03ffff:S, 0x040000-0x040fff:S, 0x041000-0x041fff:S, 0x042000-0x042fff:S, 0x043000-0x043fff:S, 0x044000-0x044fff:S, 0x045000-0x045fff:S, 0x046000-0x046fff:S, 0x047000-0x047fff:S, 0x048000-0x048fff:S, 0x049000-0x049fff:S, 0x04a000-0x04afff:S, 0x04b000-0x04bfff:S, 0x04c000-0x04cfff:S, 0x04d000-0x04dfff:S, 0x04e000-0x04efff:S, 0x04f000-0x04ffff:S, 0x050000-0x050fff:S, 0x051000-0x051fff:S, 0x052000-0x052fff:S, 0x053000-0x053fff:S, 0x054000-0x054fff:S, 0x055000-0x055fff:S, 0x056000-0x056fff:S, 0x057000-0x057fff:S, 0x058000-0x058fff:S, 0x059000-0x059fff:S, 0x05a000-0x05afff:S, 0x05b000-0x05bfff:S, 0x05c000-0x05cfff:S, 0x05d000-0x05dfff:S, 0x05e000-0x05efff:S, 0x05f000-0x05ffff:S, 0x060000-0x060fff:S, 0x061000-0x061fff:S, 0x062000-0x062fff:S, 0x063000-0x063fff:S, 0x064000-0x064fff:S, 0x065000-0x065fff:S, 0x066000-0x066fff:S, 0x067000-0x067fff:S, 0x068000-0x068fff:S, 0x069000-0x069fff:S, 0x06a000-0x06afff:S, 0x06b000-0x06bfff:S, 0x06c000-0x06cfff:S, 0x06d000-0x06dfff:S, 0x06e000-0x06efff:S, 0x06f000-0x06ffff:S, 0x070000-0x070fff:S, 0x071000-0x071fff:S, 0x072000-0x072fff:S, 0x073000-0x073fff:S, 0x074000-0x074fff:S, 0x075000-0x075fff:S, 0x076000-0x076fff:S, 0x077000-0x077fff:S, 0x078000-0x078fff:S, 0x079000-0x079fff:S, 0x07a000-0x07afff:S, 0x07b000-0x07bfff:S, 0x07c000-0x07cfff:S, 0x07d000-0x07dfff:S, 0x07e000-0x07efff:S, 0x07f000-0x07ffff:S

Erase/write done.

Verifying flash... FAILED at 0x00000000! Expected=0x00, Found=0xff, failed byte count from 0x00000000-0x0007ffff: 0x3527c

Your flash chip is in an unknown state.

Please report this on IRC at chat.freenode.net (channel # flashrom) or

mail mailto:flashrom@flashrom.org flashrom@flashrom.org, thanks!

programmer_unmap_flash_region: unmapped 0x0000000000000000

LDean
Novice
578 Views

I've checked voltages on write protect and hold pins and searched through the code hoping for some extra bit of insight. I've now changed to the Microchip SST26VF016B flash chip that I wanted originally and have added the part to the flashrom flashchips.h and .c. Flashrom now recognizes the SST26VF016B flash chip and tries to program it but can't verify the code. The SST26VF016B doesn't have the block protection that the others do and programs once the write enable command is sent. Flashrom looks like its sending the right write enable code. I realized from your flash chip is identified in the code snippet so I've got one of them coming in to see if the different chip manufacturer makes a difference.

... flashrom> sudo flashrom -VVVV -p nicintel_spi:pci=01:00.0 -w Dev_Start_I210_Copper_MCTP_16Mb_A2_3.25_0.03.bin

 

flashrom v0.9.9-r1954 on Linux 4.4.38-tegra (aarch64)

 

flashrom is free software, get the source code at https://flashrom.org/ https://flashrom.org

 

 

flashrom was built with libpci 3.3.1, GCC 5.4.0 20160609, little endian

 

Command line (5 args): flashrom -VVVV -p nicintel_spi:pci=01:00.0 -w Dev_Start_I210_Copper_MCTP_16Mb_A2_3.25_0.03.bin

 

Calibrating delay loop... OS timer resolution is 1 usecs, 2524M loops per second, 10 myus = 16 us, 100 myus = 106 us, 1000 myus = 1000 us, 10000 myus = 9988 us, 4 myus = 12 us, OK.

 

Initializing nicintel_spi programmer

 

Found "Intel Unprogrammed i210 Gigabit Ethernet Controller" (8086:1531, BDF 01:00.0).

 

===

 

This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output

 

to mailto:flashrom@flashrom.org flashrom@flashrom.org if it works for you. Please add the name of your

 

PCI device to the subject. Thank you for your help!

 

===

 

PCI header type 0x00

 

Requested BAR is of type MEM, 32bit, not prefetchable

 

PCI header type 0x00

 

Requested BAR is of type MEM, 32bit, not prefetchable

 

page_size=1000

 

pre-rounding: start=0x0000000050800000, len=0x1000, end=0x0000000050801000

 

post-rounding: start=0x0000000050800000, len=0x1000, end=0x0000000050801000

 

The following protocols are supported: SPI.

 

Probing for AMIC A25L05PT, 64 kB: programmer_map_flash_region: mapping A25L05PT from 0x00000000ffff0000 to 0x0000000000000000

 

RDID returned 0xbf 0x26 0x41 0xbf. probe_spi_rdid_generic: id1 0xbf, id2 0x2641

...

"depreciated"

...

Probing for Generic unknown SPI chip (REMS), 0 kB: REMS returned 0xff 0xff. probe_spi_rems: id1 0xff, id2 0xff

 

Found SST flash chip "SST26VF016B" (2048 kB, SPI).

 

===

 

This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE

 

The test status of this chip may have been updated in the latest development

 

version of flashrom. If you are running the latest development version,

 

please email a report to mailto:flashrom@flashrom.org flashrom@flashrom.org if any of the above operations

 

work correctly for you with this flash chip. Please include the flashrom log

 

file for all operations you tested (see the man page for details), and mention

 

which mainboard or programmer you tested in the subject line.

 

Thanks for your help!

 

programmer_map_flash_region: mapping SST26VF016B from 0x00000000ffe00000 to 0x0000000000000000

 

Block protection is disabled.

 

Reading old flash chip contents... done.

 

Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:W, 0x001000-0x001fff:S, 0x002000-0x002fff:S, 0x003000-0x003fff:S, 0x004000-0x004fff:S, 0x005000-0x005fff:S, 0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:S, 0x009000-0x009fff:S, 0x00a000-0x00afff:S, 0x00b000-0x00bfff:S, 0x00c000-0x00cfff:S, 0x00d000-0x00dfff:S, 0x00e000-0x00efff:S, 0x00f000-0x00ffff:S, 0x010000-0x010fff:S, 0x011000-0x011fff:S, 0x012000-0x012fff:S, 0x013000-0x013fff:S, 0x014000-0x014fff:S, 0x015000-0x015fff:S, 0x016000-0x016fff:S, ...

 

"depreciated"

...

0x1ec000-0x1ecfff:S, 0x1ed000-0x1edfff:S, 0x1ee000-0x1eefff:S, 0x1ef000-0x1effff:S, 0x1f0000-0x1f0fff:S, 0x1f1000-0x1f1fff:S, 0x1f2000-0x1f2fff:S, 0x1f3000-0x1f3fff:S, 0x1f4000-0x1f4fff:S, 0x1f5000-0x1f5fff:S, 0x1f6000-0x1f6fff:S, 0x1f7000-0x1f7fff:S, 0x1f8000-0x1f8fff:S, 0x1f9000-0x1f9fff:S, 0x1fa000-0x1fafff:S, 0x1fb000-0x1fbfff:S, 0x1fc000-0x1fcfff:S, 0x1fd000-0x1fdfff:S, 0x1fe000-0x1fefff:S, 0x1ff000-0x1fffff:S

Erase/write done.

Verifying flash... FAILED at 0x00000000! Expected=0x00, Found=0xff, failed byte count from 0x00000000-0x001fffff: 0x352ba

LDean
Novice
578 Views

I brought in a LE25U40CMC flash chip and it programmed well using flashrom and shows up in "lspci" as programmed. However, it won't find an IP address on its own and after giving it an IP address using "ifconfig" or "dhclient" an "iperf" speed test came in at 100MB instead of the GB speeds it looked like it was set for. I did notice the MAC address looked odd but I couldn't change it and couldn't find any posts about changing the address without EEUPDATE or other tools that I couldn't get to work or a spot in the flash memory where the MAC address was stored.

So it programmed but its still pretty much useless.

LDean
Novice
578 Views

Never mind, it was a connection problem that was preventing Gigabit speed.

Thank you for all your help.

Adolfo_S_Intel
Moderator
578 Views

Hello LaMont

Thanks for taking the time to come back and inform us of the cause of your issue, feedback on the part of the users of the forum is really appreciated.

Best Regards,

Adolfo Sanchez

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