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Depend on the below table LPDDR4 configuration 3 that CH2 and CH3 unpopulated , Can APL platform support 8GB memory size if
CH0 and CH1 populated 4GB LPDDR4 device ?
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Hello, wayneh:
Thank you for contacting Intel Embedded Community.
Please refer to the information stated in Table 3-2, on page 67 of the https://cdrdv2.intel.com/v1/dl/getContent/557555 Apollo Lake External Design Specification (EDS) Volume 1 of 4 document # 557555.
It is accessible when you are logged into your Resource & Design Center (RDC) privileged account. It can be requested by filling out the RDC Account Support form.
We hope that this information may help you.
Best regards,
Carlos_A.
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Hi Sir,
So, two Channels couldn't support 8GB memory size LPDDR4 , is right ?
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Hello, wayneh:
Thanks for your reply.
In order to be on the same page, could you please tell us if the affected is a third-party design or it has been developed by you? In case that it is a third-party device, could you please give us all the information related to it?
Could you please clarify if your last question is based on the suggested information?
Wating for your reply.
Best regards,
Carlos_A.

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