Hello, I have a few questions related to the SD3 interface on a design based on the E3826.
1. SD Card RX DLL
I am working to verify that the SD interface on our board conforms to the SD spec. Currently I am measuring that the data edges transmitted from the card to the CPU do not provide enough setup time relative to the clock transmitted from the CPU. Can the DLL settings for the SD interface (514148, BWG Vol2, section 39.5.3) be modified in order to provide more setup time internal to the processor?
2. SD Card RCOMP Procedure
Running the RCOMP procedure as outlined in section 39.5.8 in 514148 BWG Vol2 sets strength value of 0xFFFF0000 which is not ideal for our board design. Per the PDG, there is a 49.9 1% resistor connected from the SD3_RCOMP pin to GND. Is there any way to change the outcome of this procedure? Is it okay to override this result using the DFX Override registers at offsets +830h and +83Ch?
Thank you for contacting Intel Embedded Community.
Could you please clarify if this situation happens on your design or a third- party design?
In case that it is a third-party device, could you please inform the name of the manufacturer, its model, the part number, and where its documentation is stated?
On the other hand, could you please let us know how many units of the project related to this circumstance have been manufactured? How many are affected? Could you please give the failure rate? Also, could you please list the sources that you have used to design it and if it has been verified by Intel? Could you please let us know if this situation related to your design has been consulted to your BIOS developer?
Could you please give pictures of the top side markings of the affected processors?
We are waiting for your reply to these questions.