Embedded Intel Atom® Processors
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[EHL] cannot read or write external PHY register by MDIO under shell.

ScottLiao
Beginner
199 Views

Dear Sir,

 

My platform is Elkhart lake with two SGMII Gbe, GPY115 on Intel® PSE TSN GbE Controller #0 and Intel® PSE TSN GbE Controller #1. Both of Phy address is 0x01 and Host owned with pin muxed.

GPY115 can work well under Windows 10 but I cannot read or write external PHY register by MDIO under shell.

I use MAC_MDIO_ADDRESS - 0ffset 200h and MAC_MDIO_DATA- 0ffset 204h in TSN GbE Memory Mapped Registers to access MDIO by Clause 45.

For example, I want to read STD_PHYID1(Register 0.2).

1. Write 0x00020000 to Memory  base address + 0x204

2. Write 0x00204B03 to Memory  base address + 0x200

3. Write 0x00204B0F to Memory  base address + 0x200 

4. Read GMII Data of STD_PHYID1 from Memory  base address + 0x204: Bit0~Bit15

I expect to read STD_PHYID1 but the value is 0xFFFF.

It is no problem to access MDIO – Adhoc PHY Sublayer Registers by Clause 45 under UEFI shell but cannot access external PHY GPY115 register.

May I know how to access external PHY register under UEFI shell successfully?

 

Best Regards,

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1 Solution
CarlosAM_INTEL
Moderator
175 Views

Hello, @ScottLiao:

Thank you for contacting Intel Embedded Community.

We sent an email to the address related to this account with information that may help you.

Best regards,

@CarlosAM_INTEL 

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CarlosAM_INTEL
Moderator
176 Views

Hello, @ScottLiao:

Thank you for contacting Intel Embedded Community.

We sent an email to the address related to this account with information that may help you.

Best regards,

@CarlosAM_INTEL 

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