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SZann
New Contributor I
1,733 Views

ITP/XDP JTAG interface on the Development Board 1-D510 useable ?

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Hello,

on the Intel® Embedded Development Boards 1-N450 and 1-D510 there is available a connector to access the jtag debugging interface on the processor.

What i wanted to ask is whether the jtag interface on the 1-D510 board is actually useable or the board does not really support it.

Thanks.

 

1 Solution
Natalie_Z_Intel
Employee
279 Views

Hi, I did receive a reply, "Yes, it works. It was used to develop and debug the BIOS."

View solution in original post

6 Replies
WILLIAM_C_Intel
Employee
279 Views

In Intel Atom Processor D400 and D500 Series, testability for Automated Test Equipment (ATE) board level testing has been implemented as JTAG boundary scan. It add Boundary Scan ability compatible with the IEEE 1149.1-2001 Standard (Teset Access Port and Boundary-Scan Architecture) specification. And TMS (Test Mode Select) is a JTAG specification support signal used by debug tools.

You can find the information about it on Section 2.7 , 4.10.3.5 and 10 of https://www-ssl.intel.com/content/www/us/en/processors/atom/atom-d400-d500-vol-1-datasheet.html Intel® Atom™ Processor D400/D500 Series Datasheet, Vol. 1

For further informations about JTAG debug for Intel® Architecture (IA) processors, you could access the following URL.

SZann
New Contributor I
279 Views

Yes, those are useful documents.

So (also from the schematic) the board should support jtag debugging.

Howewer sometimes it happens that not all the required components are actually mounted, or maybe the current bios disables the jtag features of the cpu ...

It would be nice to know if someone as actually used this board with a jtag debugger to confirm it is enabled.

Natalie_Z_Intel
Employee
280 Views

Hi, I did receive a reply, "Yes, it works. It was used to develop and debug the BIOS."

View solution in original post

JOHAN_V_Intel
Employee
279 Views

Hi ...

Lynn is correct ... We did not do anything to prevent debugging BIOS on this board using the ITP/XDP JTAG interface.

Regards

Johan

SZann
New Contributor I
279 Views

At last i found the mistake.

Make sure that the TRSTn signal is seen at logic level HIGH by the target system, otherwise it will not work as expected.

Gabriel_T_Intel
Employee
279 Views

Hello samuelezannoli.

Thank you very much for your feet back, we really appreciate it and this information will be very helpful to others.

You are welcome to add comments and participate on any thread.

Best Regards

Gabriel

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