SPI device not found with E3800

[SLee107]

Hi guys,

I just started to work on E3827 custom board with Yocto jethro. I am quite a beginner to embedded system.

Currently I have problem when I test SPI port.

When I type

ls /dev | grep spi

ls /sys/bus/spi/devices

nothing comes up

ls /sys/bus/platform/drivers

alarmtimer dwc3 i8042 sdhci-acpi

byt_gpio efi-framebuffer iTCO_wdt serial8250

clk-lpt exynos-dwc3 keystone-dwc3 usb_phy_gen_xceiv

dw-apb-uart generic-bl leds-gpio vesa-framebuffer

dw_dmac i2c_designware pxa2xx-spi xhci-hcd

lsmod | grep spi

spi_pxa2xx_platform

I also tried "low-speed-spidev" sample for minnowboard max. It failed when modprobe low-speed-spidev and return

modprobe: ERROR: could not insert 'low_speed_spidev': No such device

dmesg and get

[ 43.102814] low-speed-spidev: module init

[ 43.110619] low-speed-spidev: master= (null)

[ 43.112946] low-speed-spidev: Failed to register SPI device

seems like when "spi_busnum_to_master" is called NULL is returned (master bus number not found)

What is 'spi_pxa2xx_platform'? Is it "pxa2xx SPI master controller"? (I Google 'pxa2xx' but still not quite understand)

What about "spidev"? I found "spidev.ko" under /lib/modules and I modprobe spidev.ko but nothing happen. (still not find /dev/spidevX.Y)

Do I need to declare slave devices in "pxa2xx_spi_chip" manner?

I have my linux kernel configuration as following (listed SPI related only):

CONFIG_UNINLINE_SPIN_UNLOCK=y

CONFIG_MUTEX_SPIN_ON_OWNER=y

CONFIG_REGMAP_SPI=m

# CONFIG_BMP085_SPI is not set

CONFIG_SCSI_SPI_ATTRS=y

CONFIG_SPI=y

# CONFIG_SPI_DEBUG is not set

CONFIG_SPI_MASTER=y

# SPI Master Controller Drivers

# CONFIG_SPI_ALTERA is not set

CONFIG_SPI_BITBANG=m

# CONFIG_SPI_BUTTERFLY is not set

CONFIG_SPI_GPIO=m

# CONFIG_SPI_LM70_LLP is not set

# CONFIG_SPI_OC_TINY is not set

CONFIG_SPI_PXA2XX_DMA=y

CONFIG_SPI_PXA2XX=m

CONFIG_SPI_PXA2XX_PCI=m

# CONFIG_SPI_SC18IS602 is not set

# CONFIG_SPI_TOPCLIFF_PCH is not set

# CONFIG_SPI_XCOMM is not set

# CONFIG_SPI_XILINX is not set

# CONFIG_SPI_DESIGNWARE is not set

# SPI Protocol Masters

CONFIG_SPI_SPIDEV=m

# CONFIG_SPI_TLE62X0 is not set

# SPI GPIO expanders:

# CONFIG_MFD_DA9052_SPI is not set

# CONFIG_MFD_MC13XXX_SPI is not set

# CONFIG_MFD_TPS65912_SPI is not set

# CONFIG_MFD_ARIZONA_SPI is not set

# CONFIG_MFD_WM831X_SPI is not set

CONFIG_SND_SPI=y

CONFIG_SND_SOC_I2C_AND_SPI=m

# CONFIG_MMC_SPI is not set

# SPI RTC drivers

CONFIG_IIO_ST_ACCEL_SPI_3AXIS=m

CONFIG_IIO_ST_SENSORS_SPI=m

CONFIG_AD5624R_SPI=m

CONFIG_IIO_ST_GYRO_SPI_3AXIS=m

CONFIG_IIO_ST_MAGN_SPI_3AXIS=m

CONFIG_IIO_ST_PRESS_SPI=m

# CONFIG_DEBUG_SPINLOCK is not set

[CarlosAM_INTEL]

Hello hsiaolee,

Thank you for contacting Intel Embedded Community.

In order to better understand this situation, could you please try to reproduce this situation with Microsoft Windows 8.1 Pro (non-connected standby), Windows WEI 8.1 (non-connected standby), Microsoft Windows 7 Pro, Windows Embedded Standard 7, Microsoft Windows 7 POS Ready 7, Linux based on Yocto Project Tools, Wind River, or VxWorks? Please try with some of the listed Operating Systems and let us know the results.

Thanks in advance for your cooperation.

Best Regards,

Carlos_A.

[BTest]

Ok, so this is a very roundabout answer but it ultimately worked for me. I am running a DO178 certified RTOS and not Linux so I can't help you with specific drivers.

Years ago Intel created a family of ARM processors called XScale with 2 main versions: PXA270 and the PXA320. They then sold this family of parts to Marvel.

If you look at the E3800 documentation for the SIO SPI (pretty much the same for the PCU SPI too) you will find it is non existent. There is no way anyone could write a driver based off the information in the data sheet. So I did a bit of reverse engineering with the register name and found them in the Linux kernel under what you found above, pxa2xx. I then went to the Marvel web site and downloaded the data sheet for the pxa270 and from it was able to create a driver.

What I believe happened is Intel just reused the silicon it developed for the pxa family for SPI in the E3800. Makes sense, why spend the money to develop new when you already have it. They then just copied the register list over and never went back to document it properly. In fact you will find references to pins that only exist on the pxa270 and not the E3800 in the registers.

So I believe you loading the correct Linux driver. But are you configuring the IO pins for SPI functionality? Is the device enabled? Do you see it in the PCI tree? Those are the places I would look first.

Brett

[SLee107]

Hi Brett,

Thank you for providing your thoughts. It hints how the SPI functions on E3800.

I went to ask vendor of the E3800 evaluation board and they told me the SIO SPI pins are not connected on my board but PCU SPI are (connected). So base on the information you kindly provided, pxa2xx (SIO SPI) is not usable in my case.

I guess my next step is to look for the information about PCU SPI and write my own driver.

[CarlosAM_INTEL]

Hello hsiaolee,

Thanks for your update.

In order to better understand this situation, could you please give us all the information of the evaluation board related to this situation?

Thanks again for your collaboration.

Best Regards,

Carlos_A.

[BTest]

Hate to tell you this but you may run into some road blocks. Mainly, if you look at the register sets this interface is pretty much for flash parts only. It only runs at 20MHz, 33MHz or 50MHz. You possibly have Secure Boot and TXE issues. And ultimately I'm not sure you have direct control over the chip selects. It reads the descriptor table out of the boot flash and that tells the hardware how many boot devices there are, 1 or 2. It then generates the CS's based on address.

I could be wrong here because it's been over a year since I last looked at it. My coworker did get it to the point that we could programatically write to areas of the boot flash but we ended up going a different direction and haven't looked at it since.

Brett

[SLee107]

Hi Carlos,

Here's link to the user's manual for my board:

https://drive.google.com/open?id=0B0WTB0-ufcyCVDVqNXgwY0JqMHliQ3hYR1ZiYmxmZXl2M18w PCOM-B632VG R1.2-20141027-1.pdf - Google Drive

Do you know if there's any sample code or reference of PCU SPI linux driver (for flash ROM)? Where can I find them?

[CarlosAM_INTEL]

Hello hsiaolee,

Thanks for your reply.

The information that may help you as a reference is stated at the https://patchwork.kernel.org/patch/9175549/ [1/3] spi-nor: Add support for Intel SPI serial flash controller - Patchwork .

In case that you have questions related to the cited patch, please address them to the email address stated on it.

On the other hand, the affected design is a third party one, we suggest you contact its manufacturer to receive the further information associated with this project.

We hope that this information is useful to you.

Best Regards,

Carlos_A.

[SLee107]

Hi Brett,

Thank you for reply.

Actually I want to use the SPI to flash external flash ROM stores FPGA design code. From what you have described, I could have one BIOS + one external SPI-flash-rom. But if I want to do flash operation of my external SPI-flash-rom I could have problem because I can't direct control chip select?

There are so little information about PCU SPI online. Do you have any suggestion on what I should look for? (keyword to google)

[BTest]

Hate to be the bearer of bad news, but I don't think you can do what you want to do. The cpu can alternatively boot from the Embedded Controller (attached to the LPC) which then frees up the PCU SPI for flash but I don't think Com Express supports it. (We used a Portwell Wade board until we had our own hardware and it does support that.). I have to ask, are you planning on embedding the Com Express are you just using it until your custom hardware arrives? Either way, the flash size and number of devices (1 or 2) are defined in the descriptor table of the 1st flash. If you make the 1st one the boot you have no way of accessing the second. If you say 2 devices in the descriptor it moves the boot vector all the way to the end of the second one.

I just looked through manual you linked to above and are you sure you don't have SPI? Looking at the manual I see it on pins A91 - A95. If that is the case then it is most likely (but not certain) that it is the SIO SPI. I would contact Portwell technical support and ask them.

Brett

[SLee107]

Hi Brett,

Thanks for the information. It is really unfortunate. Com expressed is planned to be used with our own design base board. Currently I borrow a base board from Portwell. I am asking Portwell tech support about the A9x pins. In the mean while I ask our FPGA engineer to seek alternative solution. We might just make FPGA to update SPI flash instead.