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I've been tasked with establishing the procedure for checking that the USB3 ports can operate in compliance mode on an EHL platform. If the CTC bit is zero then placing the port in compliance mode and cycling through the patterns is automatic - re: not software controllable. Well, CTC is zero, and tests to try and force setting the port in compliance mode by setting the appropriate registers (see below) have, as expected, failed.
According to kernel posts (see references) the Linux USB stack should go into compliance mode automatically if a test fixture is connected after a hardware reboot without having plugged in a USB device. We have a test fixture but only have a scope to view the signals from the fixture. The pattern generated appears to be LFPS gen 2 pings, but that's all - there is no pattern cycling. I suspect under real test conditions the test fixture would be connected to a device capable of causing the test patterns to cycle. But we don't have that at the moment.
Based on the Intel xHCI document (see references), and assuming we could setup compliance mode using software, we need to enable LWS first in order to set PLS (both are in the PORTSC register). CTC (in HCCPARAMS2 register) needs to be 1 for that but CTC is read-only.
One other thing of note is that it's supposed to be possible to enable compliance mode by doing this under Linux:
echo compliance > /dev/debug/usb/xhci/${USBEVID}/ports/port0${PORT}/portsc
There are multiple ports under that tree so it's not clear which to use but only ports 02 and 03 seem to be accessible and neither seem to change the state of the ports that suggests we're in compliance mode.
My question is: is there a procedure we should use to put USB3 ports into compliance mode on EHL? Is there a way to note, using a test fixture and a scope, that we're in compliance mode? And more importantly, is there any way to software control compliance mode and the transition to the various test signals in that mode?
Thanks!
References:
- https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/extensible-host-controler-interface--
usb-xhci.pdf - https://www.spinics.net/lists/linux-usb/msg181968.html
- https://patchwork.ozlabs.org/project/ubuntu-kernel/patch/20180703072029.14289-16-kai.heng.feng@canonical.com/
I've attached screenshots of the scope during out tests.
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Hi @mjhammel ,
Thank you for contacting the Intel Embedded Community.
Please refer to the Enable USB3.1 Compliance Mode Pattern on Elkhart Lake RDC document 618829.
In order to get the information you need an RDC account would be required; so to get access to this you need to have a Resource and Design Center (RDC) privileged account.
The RDC Account Support form is the channel to process your account update process by filling out the form stated on the following website:
https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html
You should use a business email address to evade any inconvenience. Please avoid the free email provider's address (such as the provided by Hotmail, Gmail, Yahoo, or others).
Best regards,
Jaime L.
Intel Customer Support Engineer
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