Hi.
I am working on a coreboot/uboot BIOS for a Leaf Hill CRB. The FSP binary package is from document 566285, and coreboot from document 566288. There is a problem in the call to FspMemoryInit.
Is it possible to obtain a debug version of FSP2.0 with additional debug output? This may to help identify the source of the problem.
Thank you.
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Hello, @nferd:
Thank you for contacting Intel Embedded Community.
We suggest you verify that the affected implementation fulfills with the requirements and suggestions stated in the Coreboot Apollo Lake Implementation document that can be found at:
https://www.coreboot.org/images/2/23/Apollolake_SoC.pdf
It is important to let you know that your Coreboot consultations should be addressed as a reference to the channels stated at:
https://www.coreboot.org/consulting.html
https://www.coreboot.org/Mailinglist
We hope that this information is useful.
Best regards,
For more complete information about compiler optimizations, see our Optimization Notice.