Interrupt command register (ICR) vector value (multi-processor initialization)

[fhebbache]

Hello,

We’re currently developing a software for an Intel i7-3612QE, during the multiprocessor initialization protocol specified in the [1] Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3, The local APICs of the AP cores are initialized by issuing interprocessor interrupts (IPIs). To do so, the interrupt command register (ICR) has to be set to a specific configuration as illustrated in Section 8.4.4 of [1].

Our question is related to the vector field of the ICR with INIT delivery mode (see Section 10.6.0 of [1]), what’s the behavior of the CPU if the vector field has a value different from 00H? This field has been set to 88H by our contractor and we were wondering the impact that would have on the AP cores initialization process.

Note that our MP initialization is performed only to disable all AP cores and only keep the BSP (All AP cores are put on the lowest C-state).

Thanks.

[Jaime_Lizarme]

Hi @fhebbache ,

I have been checking on RDC for the requested information, but seems like documents of Ivy Bridge platform had been removed since this product is already discontinued.

I suggest you to contact your local distributor and see if they keep these documents on their own archive.    

Best regards,

Jaime L.

Intel Customer Support Engineer