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Hi,
We are developing coreboot for Apollo lake custom board. We have enabled "MRC training data Saving" and "Enable FastBoot" in Fsp using BCT tool.
We have the FSP source (MR5).
After this we observed the boot time reduced from 31 sec to 23 sec for very first boot and 11sec for consequent boots.
We would like to reduce the boot time to the lowest as possible. We found the below logs which shows that the memory Initialization takes more time.
Coreboot FSP Performance Data
Coreboot FSP Performance Data
ID: 950 - 951: 8118676370 - 2354813461 --> 4433ms ===============> Memory Initialization
ID: 952 - 953: 10675414728 - 8905813067 --> 1361ms
ID: 954 - 955: 11761158519 - 10934089420 --> 636ms
ID: 956 - 957: 19265617974 - 19265559282 --> 0ms
- Could you please help us to reduce the memory initialization time ?
- Can we extract the MRC data and preload it to reduce the boot time?
Thanks,
Antony
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Hello, IntelForum :
Thank you for contacting Intel Embedded Community.
In order to be on the same page, could you please let us know if the design related to this has been developed by you or a third-party company? In case that it is a third-party device, please give us all the information related to it.
Could you please let us know where you obtained the MRC if it is your project? By the way, please clarify if it has been reviewed by Intel.
Waiting for the information that may answer these questions.
Best regards,
Carlos_A.
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Hi,
We just enabled MRC training data in Fsp.fd using Binary Configuration tool. We did not obtain the MRC source or binaries.
Could you please explain on this? Also please share the MRC for Apollo lake and steps we need to follow.
Thanks,
Antony
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Hello, IntelForum :
Thanks for your reply.
We suggest you address your consultations stated at this thread by filling out the https://firmware.intel.com/content/support Intel(R) Architecture Firmware Resource Center Support form.
We hope that this information may help you.
Best regards,
Carlos_A.

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