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Tigerlake UP3 no boot up

flykevin0021
Beginner
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Hi Intel, 

We have faced a problem during bring up in our in-house project. We use TGL-UP3 i7-1186GRE. 

our bring-up board didn't work. and as we checked that the problem is that PLTRST doesn't de-asserted. When we supply power to the board, all power rails and system signals work well as we expected. but it stops after SYS-PWROK. and no pltrst go to high. 

 

In the power sequence of PDG, the PLTRST should be de-asserted after sys-pwrok. we checked that all other system signals(all_sys_pwrgd,pch_pwrok,procpwrgd and vccst_pwrgd ) are works well. 

only one suspected that VCCIO power rail is not output from PCH. the VCCIO rail is a FIVR power rail so that should be output after procpwrgd HIGH. but no output at that time. 

question is.. can you explain how to controll the VCCIO power rail. what is the souce power of the VCCIO? which signal is the enable one for VCCIO? 

 

And can you let me know any check points for this issue? if you have any errata document for board bring up issue, please share that for us. 

 

Thank you for your support. 

Kevin Kim 

 

 

 

 

 

 

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Diego_INTEL
Moderator
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Hello @flykevin0021,

 

Thank you for contacting Intel Embedded Community.

 

We have a Board Bring Up guide, please check the following document in RDC:

#730333 - Board Bring Up Debug Cookbook

 

Best regards,

 

@Diego_INTEL 

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