According to the 82576 datasheet (section 11.4.4), SERDES/SGMII AC/DC specs are as per PICMG 3.1 Draft specification Rev 1.0 1000Base-BX. While the document specifies differential level requirements, it doesn't convey some info that would be specific to the 82576 SGMII implementation:
1. Common-mode voltage level (are the I/O designed to LVDS, CML, etc)...or does Intel just recommend AC coupling to another SGMII device?
2. Input termination (differential 100-ohm, common-mode biasing)...are there any requirements here, or is this all taken care of on-chip?
For now, we're following the 82576 SERDES reference design - AC coupling (as per Sheet 7), but no other termination requirement.