FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5961 Discussions

Agilex-7 SoC Uart Driver ForBaremetal App

Balerion
Beginner
241 Views

Hi,

I am trying to develope a baremetal Uart driver for Agilex-7 SoC. While I was reading the "Agilex™ 7 Hard Processor System Technical Reference Manual" I couldn't figure out what to do to transfer data and receive data from uart peripheral step by step. I mean in a sequence what should I do? I coudn't understand that. I saw in the document that, first I need to enable the clock for Uart peripheral by writing 1 to the "l4spclken" field but then what to do to? Could you please help me?

 

Thanks,

Balerion

Labels (1)
0 Kudos
4 Replies
Balerion
Beginner
201 Views

Hi again,

If there is a linux uart driver for this device, can you share that with me? So that I can take it as a base reference to write my own baremetal uart driver?

 

Thanks,

Balerion

0 Kudos
JingyangTeh
Employee
151 Views

Hi Balerion


There is no UART Driver for baremetal app for the agilex7.

However you could add the uart into the device tree and access the uart using the linux filesystem.

You could find the example on interfacing with the uart with our Agilex7 GSRD

https://www.rocketboards.org/foswiki/Documentation/AgilexSoCGSRD


Regards

Jingyang, Teh


0 Kudos
Balerion
Beginner
144 Views

Hi Jingyang, Teh

I found out at another post of mine on the forum that there is no BSP support for baremetal application on Agilex-7. However, I want to develop a simple uart app and I don't want to use linux. In this case, I guess I need to write my own uart driver. I take Agilex-7 HPS Technical reference manual for my guidance. But I don't really find detailed information about how to make Uart Controller functional. What should I do step by step in order to develop one? Could you help about that?

 

Regards,

Balerion 

0 Kudos
JingyangTeh
Employee
56 Views

HI Balerion


Sorry there is no step by step on the creation.

You could refer to how it was done for the older device which supports baremetal.

The intel-hwlibs library was used previously for baremetal application.


e.g.

There is a main file hps.h for each device family which maps the address to the register map.(Try searching for hps.h)

https://www.intel.com/content/www/us/en/programmable/hps/cyclone-v/hps.html

You could try mapping the peripheral address to the one of Agilex7 base on its register map.

https://www.intel.com/content/www/us/en/programmable/hps/agilex7/hps.html


Regards

Jingyang, Teh





0 Kudos
Reply