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Altera_Forum
Honored Contributor I
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Question regarding wm8731 audio on DE2-70

I have a question regarding the audio codec on the DE2-70 board. How is it possible to generate the proper clock frequency for the WM8731 codec from the 50MHz or 28.63MHz on-board oscillators? 

 

The WM8731 requires an input clock frequency of either 12.288MHz or 18.432MHz. How can a PLL generate either of those frequencies with the provided oscillator frequencies as its input? 

 

Thanks! 

 

Jonathon W. Donaldson
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4 Replies
Altera_Forum
Honored Contributor I
82 Views

 

--- Quote Start ---  

I have a question regarding the audio codec on the DE2-70 board. How is it possible to generate the proper clock frequency for the WM8731 codec from the 50MHz or 28.63MHz on-board oscillators? 

 

The WM8731 requires an input clock frequency of either 12.288MHz or 18.432MHz. How can a PLL generate either of those frequencies with the provided oscillator frequencies as its input? 

 

Thanks! 

 

Jonathon W. Donaldson 

--- Quote End ---  

 

 

http://www.alteraforum.com/forum/showthread.php?t=26339 

 

I have posted a design (VHDL) for the audio codec on the DE1 board in the thread above. The DE2 board uses the same codec chip. The design has a PLL configured using the MegaIP wizard for the codec. Hope it helps. 

 

Bart
Altera_Forum
Honored Contributor I
82 Views

Thanks a lot! So I think there was a bit of information that I was missing. Your design actually generates an exact 18MHz clock for the codec, which is not the precise 18.432MHz clock that the wm8731 datasheet says that it requires. So I guess what you're saying is that you don't absolutely need the exact 18.432MHz clock rate. Is that a correct interpretation? I was thinking if you didn't have the exact clock rate then you would hear all types of distortion - that's not the case? 

 

Thanks for your help! 

 

Jonathon
Altera_Forum
Honored Contributor I
82 Views

 

--- Quote Start ---  

Thanks a lot! So I think there was a bit of information that I was missing. Your design actually generates an exact 18MHz clock for the codec, which is not the precise 18.432MHz clock that the wm8731 datasheet says that it requires.  

--- Quote End ---  

 

 

You are correct that my design generates an 18 MHz clock (from a 27 MHz clock on the DE1 board). 

 

 

--- Quote Start ---  

So I guess what you're saying is that you don't absolutely need the exact 18.432MHz clock rate. Is that a correct interpretation? I was thinking if you didn't have the exact clock rate then you would hear all types of distortion - that's not the case? 

 

Thanks for your help! 

 

Jonathon 

--- Quote End ---  

 

 

I checked the FFT on the scope for a 1 KHz sine wave and found that it was pure tone. So it **seems** that you don't need the exact 18.432 MHz clock but you do bring up an interesting point that 18 MHz is off from 18.432 MHz by 432 KHz! Apparently it doesn't matter for my application BUT I would try to get as close as possible to the 18.432 MHz spec. 

 

I quickly reloaded my design and tried generating an 18.432 MHz clock, the best I could do was 18.4 MHz from the 27 MHz using the PLL. The 24 MHz base clock didn't work either, I could only get 18.4 MHz. 

 

Anyway, it would be interesting to get an 18.432 MHz clock. Did you look at the reference design for the DE2 board? Wonder what clock freq. terasic generates... 

 

Bart
Altera_Forum
Honored Contributor I
82 Views

Okay, so I checked the example audio demonstration code for the DE2-70 that is provided with the board and the "audio_pll.v" file has an input frequency of 50MHz and an M/N of 4/11, which results in an 18.181818MHz clock. 

 

So apparently Altera/Terasic (or whoever made the demonstration) also didn't deem it necessary to get an _exact_ 18.432MHz clock. So I guess that answers this riddle. Having an in-exact bit clock must just not be that big of a deal....weird. I don't understand it myself but then again I don't really need to. Haha. 

 

Thanks! 

 

Jonathon
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