Support for Intel i7-3612QE (Docs and IPIs)

[hayder1]

Hello,

We’re currently developing a software for an Intel i7-3612QE. For the development, we have some questions with regard to the following points:

• Which official Intel document should we refer to regarding the CPU? We currently have access to the following documents:
o Desktop 3rd Generation Intel® Core™ Processor Family, Desktop Intel® Pentium® Processor Family, and Desktop Intel® Celeron® Processor Family
o Mobile 3rd Generation Intel® Core™ Processor Family, Mobile Intel® Pentium® Processor Family, and Mobile Intel® Celeron® Processor Family
Note that our CPU is tagged as an embedded CPU in the Intel Ark website. However, our documents are either for Mobile or Desktop and not embedded. Is there any document specific for the Embedded 3rd generation Intel Core ? If not could you please give us some insight to which document we should refer to. Our main concern is the ECC support, which is only describe in the Desktop document version.

• During the multiprocessor initialization protocol specified in the [1] Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3, The local APICs of the AP cores are initialized by issuing interprocessor interrupts (IPIs). To do so, the interrupt command register (ICR) has to be set to a specific configuration as illustrated in Section 8.4.4 of [1]. Our question is related to the vector field of the ICR with INIT delivery mode (see Section 10.6.0 of [1]), what’s the behavior of the CPU is the vector field has a value different from 00H? This field has been set to 88H by our contractor and we were wondering the impact that would have on the AP cores initialization process.
Note that our MP initialization is performed only to disable the all AP cores and only keep the BSP (All AP cores are put on the lowest C-state).

Thank you.