FPGA plugin in Deep Learning Inference Engine

[vemparala__manoj_roh]

Hello,

I would like to know the procedure for converting the IR files (.bin, .xml) to the FPGA binary format (.aocx). Does the inference engine generate the FPGA binary files or uses the pre compiled aocx files? 

I tried executing the following command 

sudo ./classification_sample -i /opt/intel/computer_vision_sdk_fpga_2018.0.234/deployment_tools/demo/car_1.bmp -m /opt/intel/computer_vision_sdk_fpga_2018.0.234/deployment_tools/demo/ir/squeezenet1.1/squeezenet1.1.xml -nt 5 -d HETERO:FPGA,CPU 

classification_sample is the first example demonstrating the inference engine software. squeezenet1.1.xml and squeezenet1.1.bin are the generated binary files. But I end up with plugin errors. 

Can anyone help me with this issue?

Greetings,

Manoj. 

[Santiago_M_Intel]

I believe I'm running into the same issue on the plugin error: 

[ Error ] Cannot find plugin to use :Tried load plugin : dliaPlugin, error Plugin dliaPlugin cannot be loaded: cannot load plugin: dliaPlugin from: Cannot load library 'libdliaPlugin.so': libOpenCL.so.1: cannot open shared object file: No such file or directory. 

I checked that libdliaPlugin.so exists in <CV SDK install path>/deployments_tools/inference_engine/lib/centos_7.4/intel64/libdliaPlugin.so

and my LD_LIBRARY_PATH is set to:  <CV SDK install path>/deployments_tools/inference_engine/lib/centos_7.4/intel64:<inteldevstack install path>/intelFPGA_pro/hld/host/linux64/lib:<inteldevstack/a10_gx_pac_ias_1_0_prq/opencl/opencl_bsp/linux64/lib

This only happens when set with "-d HETERO:FPGA,CPU" options.

Please advise. 

Thanks,

-Santiago

[Yatish_M_Intel]

i get same error as well :(

[Alexey_M_Intel1]

Hello, new package for FPGA is available for downloading, could you please try it?

l_openvino_toolkit_fpga_p_2018.1.267.tgz

[Santiago_M_Intel]

Try the following to check file in existence of file in /etc/OpenCL/vendor/Altera.icd

Create symbolic link to Altera.icd file Intel OpenCL Runtime/Development Kit installation path:

.e.g. ln -s <path to opencl install>/Altera.icd Altera.icd

Reference:

https://stackoverflow.com/questions/20335579/error-clgetplatformids-1001-when-running-opencl-code-linux/20336286#20336286

[mvemp]

I have downloaded the new package of OpenVINO. It looks really great in the first sight. But I think the descreption of the binary files included in the package are missing

0-8-1_a10dk_fp11_16x32_arch16.aocx

0-8-1_a10dk_fp16_8x24_arch13.aocx

0-8-1_a10dk_fp16_8x48_arch06.aocx

0-8-1_a10dk_fp11_16x32_arch19.aocx

0-8-1_a10dk_fp16_8x32_arch09.aocx 

0-8-1_a10dk_fp16_8x48_arch08.aocx

I see that the arch17 is SqueezNet according to https://software.intel.com/en-us/articles/OpenVINO-Install-Linux-FPGA. ;

Is it possible to access the host .cpp and device .cl files using OpenVINO package or just the binaries are available?

[XingYing_T_Intel]

Santiago M. (Intel) wrote:

This only happens when set with "-d HETERO:FPGA,CPU" options.

I'm seeing similar error "[ ERROR ] Cannot find plugin for device: Default" with the same hetero option as well.

Have you solved this error?

[Santiago_M_Intel]

Make sure your AOCL_BOARD_PACKAGE_ROOT is referring to the correct board you have installed and the right FPGA ICD file in /etc/OpenCL/vendors.

More details here: https://software.intel.com/en-us/articles/OpenVINO-Install-Linux-FPGA#inpage-nav-5-2-1

Also at runtime, set this environment variable, this with not reprogram the FPGA and use a pre-programmed bitstream 

export CL_CONTEXT_COMPILER_MODE_ALTERA=3

export CL_CONTEXT_COMPILER_MODE_INTELFPGA=3