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Hello,
after posting in others Intel forums I arrive here looking for an answer.
I am playing with the acpi specification and a basic OS. I would like to implement some acpi functions over this OS. One of them is the processor control (throttling). It is managed thought the Processor Register Block (P_BLK). but I can not find a way to locate this register block.
I saw intel and ACPI web page (acpi.info). I downloaded the specification from last one.
I am working at a low level programing (C) read/writing into the registers, not the specification's ASL or AML. And I am starting with the acpi component architecture (ACPICA), but I do not found the throttling configuration in it.
The OS I am working with is MaRTE OS (http://marte.unican.es), a Hard RTOS with a Minimal RT POSIX.13 subset. I am working at a low level programing (C) read/writing into the registers, not the specification's ASL or AML. And I am starting with the acpi component architecture (ACPICA), but I do not found the throttling configuration in it.
I would like to know how to locate this register block (P_BLK).
Thank you.
Daniel M.
after posting in others Intel forums I arrive here looking for an answer.
I am playing with the acpi specification and a basic OS. I would like to implement some acpi functions over this OS. One of them is the processor control (throttling). It is managed thought the Processor Register Block (P_BLK). but I can not find a way to locate this register block.
I saw intel and ACPI web page (acpi.info). I downloaded the specification from last one.
I am working at a low level programing (C) read/writing into the registers, not the specification's ASL or AML. And I am starting with the acpi component architecture (ACPICA), but I do not found the throttling configuration in it.
The OS I am working with is MaRTE OS (http://marte.unican.es), a Hard RTOS with a Minimal RT POSIX.13 subset. I am working at a low level programing (C) read/writing into the registers, not the specification's ASL or AML. And I am starting with the acpi component architecture (ACPICA), but I do not found the throttling configuration in it.
I would like to know how to locate this register block (P_BLK).
Thank you.
Daniel M.
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Have you consulted Intel 64 and IA-32 Architectures
Software Developers Manual
Volume 3A:
System Programming Guide, Part 1, (and 3B Part 2.)
These are available for public download. In particular you may be interested in chapter 13 "Power and Thermal Management".
Hope this helps.
Regards, Melanie
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Quoting - miblower
Have you consulted Intel 64 and IA-32 Architectures
Software Developers Manual
Volume 3A:
System Programming Guide, Part 1, (and 3B Part 2.)
These are available for public download. In particular you may be interested in chapter 13 "Power and Thermal Management".
Hope this helps.
Regards, Melanie
Thank you very much.
In that Chapter I found some registers that is used to modify the CPU frequency. More difficult was understood how to access them, but once found the RDMSR and WRMSR, all were so easy.
Now, I have another question.
I am changing the CPU frequency through IA32_CLOCK_MODULATION MSR. I have check that the frequency really changed.
To know the real frequency I am working to, I am using two methods.
- reading IA32_APERF / IA32_MPERF MSR. The division should give me the ratio (1- full, 0,5- half ... of max freq)
- using tsc timers and a loop. I get ratios too.
the problem is that ratios are different.
for example:
theoretical - APERF/MPERF - TSC
1.000 - 1.000 - 1.000
0.875 - 0.877 - 0.853
0.750 - 0.760 - 0.708
0.625 - 0.638 - 0.568
0.500 - 0.538 - 0.448
0.375 - 0.434 - 0.325
0.250 - 0.363 - 0.239
0.125 - 0.270 - 0.132
what should I take as a good value of the frequency ??
Thanks again.
Daniel M.

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