Branch instructions in 64 bit mode

[logicman112]

In 64-bit mode, the operand size for all near branches (CALL, RET, JCC, JCXZ, JMP,
and LOOP) is forced to 64 bits. These instructions update the 64-bit RIP without the need for a REX operand-size prefix.
The following aspects of near branches are controlled by the effective operand size:
Truncation of the size of the instruction pointer
Size of a stack pop or push, due to a CALL or RET
Size of a stack-pointer increment or decrement, due to a CALL or RET
Indirect-branch operand size
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I wrote an extract of Intel manual in the above.

In one sentence it says the operand size of 64 bit branch instructions is 64 bits only but then it talks about the effective operand size! Can effective operand size( in 64 bit mode) not
be 64 bits?

What is the meaning of truncation of the instruction pointer in the above line of the Intel manual?

[SHIH_K_Intel]

The size attribute of the operand for branch instructions are closely related to "address_size". This makes branch instructions different from data processing instructions.

The Address_size attribute can be overridden by 67H prefix, a legacy created since 16-bit processors. That was important for the software transition for 32-bit processors so that it can handle 16-bit code and 32-bit code without mode transition.

The transition from 32-bit to 64-bit involves compatibility mode which behaves just like before, 67H prefix can override address_size attribute from 32-bit to 16 bit.

In 64-bit mode's flat addressing programming paradigm, there aren't many practical needs to change the address_size attribute. But 67H prefix is kind of built-in from hardware perspective. So you see it still affecting branch instructions, which is kind of analogous to appendicitis to most programmers on the application side.

Address_size can affect IP and produce different wrap-around behavior