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I have a problem using wrmsr IA32_PERF_CTL, in kernel space I get a STATUS_PRIVILEGED_INSTRUCTION exception and Windbg, which has a wrmsr function, reports "no such msr". This is on an i5-2410M CPU.
The same code and Windbg do not generate errors on another test platform. What could be the cause of this?
By the way rdmsr IA32_PERF_STS works OK on both platforms.
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Hi
It says this: "State transitions are initiated by writing a 16-bit value to the IA32_PERF_CTL register" which implies only eax is written to. However IA32_PERF_CTL reads both edx and eax: For example to turn off 'Turbo' mode bit 1 of edx needs to be set.
It seems that on the 32 bit processor on which the exception does not occur the code behind wrmsr does not care if edx is set to its existing value, ie, unchanged after doing a rdmsr.
However on the 64 bit platofrm with the exception it seems bits 1-31 of edx must be explicitely cleared before wrmsr is run.
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>>>However on the 64 bit platofrm with the exception it seems bits 1-31 of edx must be explicitely cleared before wrmsr is run>>>
Thanks for that info.
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I have been investigating the issue with the debugger error "no such msr" and I have found that some of the msr registerd can not be written from ring0 code.They are accessible only from SMM mode.It could be accessed for example from BIOS code by writing to I/O port 0x0B2.
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I have been investigating the issue with the debugger error "no such msr" and I have found that some of the msr registerd can not be written from ring0 code.They are accessible only from SMM mode.It could be accessed for example from BIOS code by writing to I/O port 0x0B2
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I have been investigating the issue with the debugger error "no such msr" and I have found that some of the msr registerd can not be written from ring0 code.They are accessible only from SMM mode.It could be accessed for example from BIOS code by writing to I/O port 0x0B2
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Sorry for multiple posts I thought that this is IDZ website issue.
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