Community
cancel
Showing results for 
Search instead for 
Did you mean: 
logicman112
Beginner
89 Views

Intel documentation seems to have wrong or ambiguous information!

Intel 64 and IA-32 Architectures Software Developers Manual
Volume 1: Basic Architecture
Order Number: 253665-034US March 2010

3.4.1.1 General-Purpose Registers in 64-Bit Mode
8-bit and 16-bit operands generate an 8-bit or 16-bit result. The upper 56 bits or
48 bits (respectively) of the destination general-purpose register are not be
modified by the operation. If the result of an 8-bit or 16-bit operation is intended
for 64-bit address calculation, explicitly sign-extend the register to the full
64-bits.

-----------------------------------------------------------------------------------------------

How we can specify 8 or 16 bit registers in 64-bit mode memory addressing? Is the Intel doc wrong?
Are the following instructions correct in Intel 64:

MOV [AX], BL
MOV [BL], AL

What does it mean, "8-bit or 16-bit operation "?
0 Kudos
1 Reply
mecej4
Black Belt
89 Views

I do not see anything incorrect in the excerpt that you took from the manual. The manual is discussing cases where the result of an 8 or 16 bit calculation is used later as part of a 64 bit r/m.

For example, consider table lookup indexed on a character byte. The table search puts an index into, say, AL. To make this work properly with AL being positive, we need to zero RAX before doing the table lookup. On the other hand, with AL considered negative, zeroing RAX in a prior step will not result in a correct 64 bit address.

Next, as to mixing 8, 16 and 32 bit register operands in 64 bit address expressions:

MOV [AX], BL

is not valid in 32-bit or 64 bit mode. It is valid in 16 bit 8086/88/188/186 mode.

In 32-bit mode, you can say

MOV [EAX], BL

and, in 64-bit mode:

MOV [RAX], BL

In the instructions above, the source operand is BL and, therefore, its size is known (8-bit). In other cases, where the size of the operand is not obvious and more than one size operand is valid, you will need to provide "BYTE PTR".

Concerning 8 or 16 bit operation:

The instruction

ADD AL, BL

is an 8-bit operation. Should this be followed by another instruction that uses AX or EAX or RAX in an R/M adress expression, the admonition concerning sign-extension needs to be heeded.
Reply