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Hi experts,
Now I want a process like psllw(d/q) behavior, but COUNT can be unequal for each word(dword/qword etc).
How can I do that, any instruction or instruction pairs can be use?
Appreciate if you can give me some tips/hints.
Thank you in advance.
-Steven
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Here I will provide the sample to make this question much clearer:
Assume Bi (0-7) for Byte(s) in some xmm0 register in LSB,
xmm0 = 00 00 00 00 00 00 00 00 B7 B6 B5 B4 B3 B2 B1 B0
How can I get desired result? like,
xmm1 = (B7<<7) (B6<<6) (B5<<5) (B4<<4) (B3<<3) (B2<<2) (B1<<1) (B0<<0)
Thanks.
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Let me propose to simulate the shifting via PMULLW (SSE 2) or PMULLD (SSE 4.1) as a poor replacement.
When AVX2 becomes available you can apply the commands VPSLLVD and VPSLLVQ.
Alternatively AMD provides the commands VPSHL(B/W/D/Q) with their new XOP commands.
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Thanks Sirrida for your answer here. It is very valuable for me to follow this.

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