Community
cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
6 Views

Error while loading IppSP libraries

Hi,

I am evaluating the IPP 7.0 version and trying to speed up the execution time of my applications.

Currently, I am runningone of themwhich is using header files as below:

ipp.h
ipps.h
ippcore.h

and Iwant to have a dynamic linking.


I linked the following libs:

ippcore.lib,
ipps.lib

and I am using the complete IPP CPU specific libraries suiteat run time including:

ippcore-7.0.dll
ipps-7.0.dll
libiomp5md.dll

The applications works fine on my machine (which has an Intel Xeon E31245 CPU)where 7.0 IPP is installed, but when I copy the exe and dlls on toanothermachine (which has a Mobile Intel Celeron CPU)and start it, it throws an error saying "Error at loading of IppSP library. No DLLs were found in the waterfall procedure".

Could you please let me know if I am missing something? Does IPP 7.0 support the Intel Mobile Celeron CPU?

Thanks very much in advance.


Best Regards,

Gregorio Chindamo

0 Kudos
7 Replies
Highlighted
6 Views

Hi Gregorio,
the DLLs you listed are not cpu-specific libraries. In order your application work on another system you also need ippsXX-7.0.dll (where XX is two character code of cpu specific implementation).
Note, IPP provides cpu-specific libraries only for functional domain libraries (like signal processing 'ipps' or image processing 'ippi'). The core library and OpenMP runtime library don't have cpu-specific implementation.
Regards,
Vladimir
0 Kudos
Highlighted
Employee
6 Views

Hi Gregorio,

Here is IPPKB article for you reference, http://software.intel.com/en-us/articles/intel-integrated-performance-primitives-intel-ipp-understan...

IA-32pxC optimized for all IA-32 processorsi386+
a6SSEPentium IIIthru 5.3 only
w7SSE2P4, Xeon, Centrino
t7SSE3Prescott, Yonah
v8Supplemental SSE3Core 2, Xeon 5100, Atom
s8Supplemental SSE3 (compiled for Atom)Atomnew in 6.0
p8SSE4.1, SSE4.2, AES-NIPenryn, Nehalem, Westmeresee notes below
g9AVXSandy Bridge architecturenew in 6.1
Intel 64 (EM64T)mxC-optimized for all Intel 64 platformsP4SSE2 minimum
m7SSE3Prescott
u8Supplemental SSE3Core 2, Xeon 5100, Atom
n8Supplemental SSE3 (compiled for Atom)Atomnew in 6.0
y8SSE4.1, SSE4.2, AES-NIPenryn, Nehalem, Westmeresee notes below
e9AVXSandy Bridge architecturenew in 6.

So you may need distribute cpu-specific library likeippiw7-7.0.dll ippiv8-7.0.dll etc with ippi-7.0.dll also.

Regards,
Ying
0 Kudos
Highlighted
Valued Contributor II
6 Views

Ying,

I checked the article and I don't see any support for Intel Mobile Celeron CPU. Or I missed it?

So, the question remains open and I hope thateverybody is interested to get an exact answer on the question:

Does IPP 7.0 support the Intel Mobile Celeron CPU?

Please, answer ( or confirm )Yes or No.

Thank you in advance.

Best regards,
Sergey
0 Kudos
Highlighted
Employee
6 Views

Hi Sergey,

Thanks for reminder. Sure, I add more.

Let's first define "suport", wecan say, support means thatIPP 7.0based application (32bit or64bit)can run onthe machinewithsupported OS. Please See IPPsystem requirements
  • Intel IPP 7.0 System Requirements

  • Then Yes, IPP 7.0 support the Intel Moblile Celeron CPU with supportes OS.

    Actually,Intel IPPsupporta system with an IA-32/Intel 64architecture processor supporting the Intel Streaming SIMD Extensions.

    and the CPU-specific dispatcherarebased on SIMD capabilities, So there is not limited with processor type, either Moblile Celeron CPU, Celeron Destop, Core 2 Duoprocessor.
    http://software.intel.com/en-us/articles/understanding-simd-optimization-layers-and-dispatching-in-t...

    User may find the exact cpu-specifed dll supported on the machine by IPP cpuinfo sample in

  • Download the Intel IPP Code Samples

  • Best Regards,
    Ying

    0 Kudos
    Highlighted
    New Contributor II
    6 Views

    Hi All,

    I've already answered this question: IPP 7.0.x supports only SSE2 and higher CPUs. See http://software.intel.com/en-us/forums/showthread.php?t=101206

    Regards,
    Igor
    0 Kudos
    Highlighted
    Valued Contributor II
    6 Views

    Hi Igor, Thank you!

    I wouldaddan additional identifier ippCpuUnsupportedtothe enumeration IppCpuType:

    typedef enum
    {

    ippCpuUnknown= 0x00,
    ...
    ippCpuUnsupported = 0xFF

    } IppCpuType;

    and if a CPU is not supportedreturn the value when IppCoreGetCpuType( ... ) function is called.

    Best regards,
    Sergey

    PS: Of course, ippCpuUnknown also could be used but I think thatsomeCPU could be "Known" but "Not Supported".
    0 Kudos
    Highlighted
    New Contributor II
    6 Views

    Hi Sergey,
    sounds reasonable, will be implemented.

    Regards,
    Igor
    0 Kudos