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Thanks
Steve
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"fixed point" compared "real FPU"
Or you mean anything else? Do you think "fixed point" means implementation of FP operations not implementation of algorithm?
Regards,
Vladimir
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sorry about the very badly phrased question.
There are two parts two it, firstly,
1) I would like to know how processor intensive FPU emulation is on the IXP465.
2) I would also like to know how much performance I lose when I take an algorithm which currently uses floating point math, and then re-write this algorithm to use fixed point math.
In order to do this I assume that the floating point algorithm is run on a processor comperable to the 266MHz xscale core, but with an FPU, and that the fixed point algorithm is run on the xscale 266MHz core (either by means of hand coding, or by using the intel fixed point libraries).
Phew!
Steve
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There is an example on the base of the one point FIR function with 32f coefficients and 16s data (for IXP coefficients are converted to the Q15 fixed point format), performance numbers are in cpMACs number of processor clocks per one multiply and accumulate:
order |
sx |
S2 |
px(P4) |
w7(P4) |
2 |
137.7 |
98.0 |
67.0 |
40.0 |
8 |
33.5 |
28.9 |
22.0 |
22.0 |
32 |
13.1 |
7.0 |
9.5 |
5.9 |
128 |
8.3 |
3.5 |
6.4 |
2.5 |
Where: sx fixed point C code for IXP
s2 fixed point asm code for IXP
px FPU code generated by C compiler for P4
w7 SSE2 asm code for P4
order number of taps.
As anyone can see there is no so big difference in cpM AC performance, but if we take into account CPU frequency
Several words about emulation: if we use float emulation on IXP, performance degradation can be hundred times.
Regards,
Vladimir
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I shall need to sit down and digest this information.
Steve
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